MPC5644B View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
MFG CO.
'MPC5644B' PDF : 114 Pages View PDF
M7
TX_CLK (input)
M5
TXD[3:0] (outputs)
M8
TX_EN
TX_ER
M6
Figure 22. MII transmit signal timing diagram
4.18.3 MII Async Inputs Signal Timing (CRS and COL)
Table 46. MII Async Inputs Signal Timing1
Spec
Characteristic
Min
Max
M9
CRS, COL minimum
1.5
—
pulse width
1 Output pads configured with SRE = 0b11.
Unit
TX_CLK period
CRS, COL
M9
Figure 23. MII async inputs timing diagram
4.18.4 MII Serial Management Channel Timing (MDIO and MDC)
The FEC functions correctly with a maximum MDC frequency of 2.5 MHz.
Table 47. MII serial management channel timing1
Spec
Characteristic
Min
Max
Unit
M10
MDC falling edge to
0
MDIO output invalid
(minimum
propagation delay)
—
ns
M11
MDC falling edge to
—
25
ns
MDIO output valid
(max prop delay)
M12
MDIO (input) to MDC
28
—
ns
rising edge setup
M13
MDIO (input) to MDC
0
rising edge hold
—
ns
MPC5646C Microcontroller Data Sheet, Rev. 3
84
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
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