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MPC8349VVAGF View Datasheet(PDF) - Freescale Semiconductor

Part Name
Description
MFG CO.
'MPC8349VVAGF' PDF : 88 Pages View PDF
Ethernet: Three-Speed Ethernet, MII Management
Table 20. RGMII/RTBI (When Operating at 2.5 V) DC Electrical Characteristics
Parameters
Symbol
Conditions
Min
Supply voltage 2.5 V
LVDD
2.37
Output high voltage
VOH
IOH = –1.0 mA
LVDD = Min
2.00
Output low voltage
VOL
IOL = 1.0 mA
LVDD = Min GND – 0.3
Input high voltage
VIH
LVDD = Min
1.7
Input low voltage
Input high current
Input low current
VIL
LVDD = Min
–0.3
IIH
VIN1 = LVDD
IIL
VIN1 = GND
–15
Note:
1. The symbol VIN, in this case, represents the LVIN symbol referenced in Table 1 and Table 2.
Max
2.63
LVDD + 0.3
0.40
LVDD + 0.3
0.70
10
Unit
V
V
V
V
V
μA
μA
8.2 GMII, MII, TBI, RGMII, and RTBI AC Timing Specifications
The AC timing specifications for GMII, MII, TBI, RGMII, and RTBI are presented in this section.
8.2.1 GMII Timing Specifications
This section describes the GMII transmit and receive AC timing specifications.
8.2.1.1 GMII Transmit AC Timing Specifications
Table 21 provides the GMII transmit AC timing specifications.
Table 21. GMII Transmit AC Timing Specifications
At recommended operating conditions with LVDD/OVDD of 3.3 V ± 10%.
Parameter/Condition
Symbol1
Min
Typ
Max
Unit
GTX_CLK clock period
tGTX
8.0
ns
GTX_CLK duty cycle
tGTXH/tGTX
43.75
56.25
%
GTX_CLK to GMII data TXD[7:0], TX_ER, TX_EN delay
tGTKHDX
0.5
5.0
ns
GTX_CLK clock rise time, VIL(min) to VIH(max)
tGTXR
1.0
ns
GTX_CLK clock fall time, VIH(max) to VIL(min)
GTX_CLK125 clock period
tGTXF
1.0
ns
tG1252
8.0
ns
GTX_CLK125 reference clock duty cycle measured at LVDD/2 tG125H/tG125
45
55
%
Notes:
1. The symbols for timing specifications follow the pattern t(first two letters of functional block)(signal)(state)(reference)(state) for inputs and
t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tGTKHDV symbolizes GMII transmit timing (GT)
with respect to the tGTX clock reference (K) going to the high state (H) relative to the time date input signals (D) reaching the
valid state (V) to state or setup time. Also, tGTKHDX symbolizes GMII transmit timing (GT) with respect to the tGTX clock
reference (K) going to the high state (H) relative to the time date input signals (D) going invalid (X) or hold time. In general,
the clock reference symbol is based on three letters representing the clock of a particular function. For example, the subscript
of tGTX represents the GMII(G) transmit (TX) clock. For rise and fall times, the latter convention is used with the appropriate
letter: R (rise) or F (fall).
2. This symbol represents the external GTX_CLK125 signal and does not follow the original symbol naming convention.
MPC8349E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 10
22
Freescale Semiconductor
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