Ethernet: Three-Speed Ethernet, MII Management
Figure 11 shows the MII receive AC timing diagram.
tMRX
tMRXR
RX_CLK
RXD[3:0]
RX_DV
RX_ER
tMRXH
tMRXF
Valid Data
tMRDVKH
tMRDXKH
Figure 11. MII Receive AC Timing Diagram
8.2.3 TBI AC Timing Specifications
This section describes the TBI transmit and receive AC timing specifications.
8.2.3.1 TBI Transmit AC Timing Specifications
Table 25 provides the TBI transmit AC timing specifications.
Table 25. TBI Transmit AC Timing Specifications
At recommended operating conditions with LVDD/OVDD of 3.3 V ± 10%.
Parameter/Condition
Symbol1
Min
Typ
Max
Unit
GTX_CLK clock period
tTTX
—
8.0
—
ns
GTX_CLK duty cycle
tTTXH/tTTX
40
—
60
%
GTX_CLK to TBI data TXD[7:0], TX_ER, TX_EN delay
tTTKHDX
1.0
—
5.0
ns
GTX_CLK clock rise, VIL(min) to VIH(max)
tTTXR
—
—
1.0
ns
GTX_CLK clock fall time, VIH(max) to VIL(min)
GTX_CLK125 reference clock period
tTTXF
—
—
1.0
ns
tG1252
—
8.0
—
ns
GTX_CLK125 reference clock duty cycle
tG125H/tG125
45
—
55
ns
Notes:
1. The symbols for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs
and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tTTKHDV symbolizes the TBI transmit
timing (TT) with respect to the time from tTTX (K) going high (H) until the referenced data signals (D) reach the valid state (V)
or setup time. Also, tTTKHDX symbolizes the TBI transmit timing (TT) with respect to the time from tTTX (K) going high (H) until
the referenced data signals (D) reach the invalid state (X) or hold time. In general, the clock reference symbol is based on
three letters representing the clock of a particular function. For example, the subscript of tTTX represents the TBI (T) transmit
(TX) clock. For rise and fall times, the latter convention is used with the appropriate letter: R (rise) or F (fall).
2. This symbol represents the external GTX_CLK125 and does not follow the original symbol naming convention
MPC8349E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 10
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Freescale Semiconductor