MSM5718B70 View Datasheet(PDF) - Oki Electric Industry
Part Name
Description
MFG CO.
'MSM5718B70' PDF : 40 Pages View PDF
MSM5718B70
¡ Semiconductor
ClockToMaster
ClockFromMaster
BusEnable, BusCtrl, BusData[8:0]
1 SIn
11
Receiver
11
Rambus Channel
RxClk 1 1 TxClk
RClk Clock Generator TClk
SOut 1
10
Transmitter
10
Request, SMode, SAdr, SCtrl
WriteData[7:0][8:0]
Ack[1:0] ReadData[7:0][8:0]
37
25 8
72
72
Op[3:0]
Adr[10:3]
Internal Data Bus
OpX[1:0]
Adr[2:0]
Adr[35:11]
Count[7:0]
Start, Close
SMode[1:0]
Address
Mapping
Logic
SAdr[31:1][10:3]
SCtrl[7:0]
Command and
Control Logic
Device Id
Compare
RowAddres
Compare
CoreAddres
Compare
AddressSelect[3:0][8:0]
Deviceld[3:0][8:0]
DeviceType[3:0][8:0]
Delay[3:0][8:0]
Mode[3:0][8:0]
DeviceManufacture[3:0][8:0]
Row[3:0][8:0]
RefRow[3:0][8:0]
MinInterval[3:0][8:0]
RasInterval[3:0][8:0]
2
CoreAccess
CoreRestore
8
CoreColAddr
72
72¥256 RowSenseAmpLatch
72¥256
72¥256¥512 DRAM Array - Bank 0
1
CoreBankAddr
9
CoreRowAddr
72
MDReg[7:0][8:0]
72
72
72
72¥256 RowSenseAmpLatch
72¥256
72¥256¥512 DRAM Array - Bank 1
Fig. 13 RDRAM Block Diagram
14
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