MSM5718B70 View Datasheet(PDF) - Oki Electric Industry
Part Name
Description
MFG CO.
'MSM5718B70' PDF : 40 Pages View PDF
¡ Semiconductor
MSM5718B70
RDRAM REGISTERS
The 18M RDRAM contains ten registers. These are read and written with the Rreg, Wreg, and WregB
commands. They are used to provide configuration information to the RDRAM controller
(DeviceType, MinInterval, and DeviceManufacture), to control device, bank, and row addressing
(DeviceId, AddressSelect, and Row), to control refresh (RefRow), to control RDRAM timing (Delay
and RasInterval), and to control RDRAM operation (Mode). The following table summarizes these
functions:
Table 7 Register Summary
Register Name
DeviceType[3:0][8:0]
Deviceld[3:0][8:0]
Delay[3:0][8:0]
Mode[3:0][8:0]
RefRow[3:0][8:0]
RasInterval[3:0][8:0]
MinInterval[3:0][8:0]
AddressSelect[3:0][8:0]
DeviceManufacturer[3:0][8:0]
Row[3:0][8:0]
Reg. #
0
1
2
3
5
6
7
8
9
128
Description
Read-only register that defined the size and configuration of the RDRAM.
Used to specify the base address for the RDRAM.
Used to specify CAS timing parameters.
Used to initialize the RDRAM and set the IOL output current.
Used to specify the next row and bank of the RDRAM to be refreshed.
Used to specify RAS timing parameters.
Read-only register defining minimum timing parameters for CAS accesses.
Used to specify address bit swapping to maximize RDRAM cache hit rate.
Read-only register containing a manufacturer code.
Used to specify the currently sensed row in each bank.
The following diagrams show the individual fields of the RDRAM registers. The color of a field
denotes its usage: dark-gray is unimplemented, light-gray is read-only, and white is read-write. The
arrow within each multi-bit field points from the least-significant bit to the most-significant bit. Bit
and byte numbering use little-endien notation.
Fig. 15 Registers
DeviceType Register - 0
Read-only register that defines the size and
configuration of an RDRAM.
876543210
Byte[0]
ColumnBits
Bns
Bns (Bonus) - 9 (1) bit bytes
ColumnBits - 1011 (number of column addr bits)1
Byte[1]
BankBits
RowBits
RowBits - 1001 (number of row addr bits)2
BankBits - 0001 (number of bank addr bits)3
Byte[2]
–
–
Byte[3]
Version
Type
Type - 0000 (RDRAM device)
Version - 0001 (extended architecture)
1. This value specifies the number of bytes per row (1011=1110=211=2048 bytes). This is the address range over
which accesses may be made without causing a row miss.
2. This value specifies the number of rows per bank (1001=910=29=512 rows).
3. This value specifies the number of banks per RDRAM (1=110=21=2 banks).
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