MSM5718B70 View Datasheet(PDF) - Oki Electric Industry
Part Name
Description
MFG CO.
'MSM5718B70' PDF : 40 Pages View PDF
¡ Semiconductor
MSM5718B70
BYTE MASKING
Contiguous byte masking is supported by the WseqNpb command. This command uses the
Adr[2:0] and Count[2:0] fields of the request packet (Fig. 6) to specify the byte masks of the first and
last octbytes of a data packet. The RDRAM also supports a more general form of byte masking called
non-contiguous byte masking. This is available with the Wbns write commands.
As can be seen in column nine of Table 6 for the WbnsNpb command, the first data packet, and every
ninth thereafter, contain byte masking information that is applied to the eight data packets that
follow. This means data packets 0, 9, 19, and 27 (gray boxes in the table) are not written to memory,
but are instead used as byte masks for the eight octbytes of data that follow. This means that the data
packet Data [35:0] may consist of up to 36 octbytes of information: 4 octbytes of byte mask information
and 32 octbytes of data that is actually written to memory.
Each bit of the 64-bit byte mask (one octbyte) controls whether a byte of the following 64 bytes of data
(eight octbytes) is written (one) or not written (zero) to memory.
Static bit masking is also available with non-contiguous byte masking. This is shown in the last two
columns of Table 6 labeled WbnsDpb and WbnsMpb. The WbnsDpb command applies a static bit
held in the MDReg to each octbyte of data W[31:0]. Each bit of the data octbyte is written if the
corresponding bits of both the bitmask and bytemask are a one, and is not written if either is a zero.
The WbnsMpb command applies a different bitmask Bit[31:0] to a static data octbyte held in the
MDReg. Each bit of the data octbyte is written if the corresponding bits of both the bitmask and
bytemask are a one, and is not written if either is a zero.
Figure 14 shows how the bits of each Data[i][[7:0][8:0] octbyte are flow through the wire circuitry as
a function of the operation type. The data W[i][j][8:0] is written if the corresponding Bit[i][j][8:0] and
Byte [i][j] mask bits are set.
Write data to RDRAM
sense amplifier
MDreg
0mux1
W[i][j][8:0] 9
0mux1
Mpb
9
Bit[i][j][8:0]
DQ[i][j][8:0]
9
Bpb
Even
octbyte
Data[i][j][8:0]
9
ByteMask
Wbns
1
63
0,9,18,27 octbyte
9x Npb
9x Byte[i][j]
9x Wbns
used by other bytes
i = {0, 1, ..., n-1} Data octbyte index
j = {0, 1, ..., 7} Byte index
k = {0, 1, ..., 8} Bit index
Fig. 14 MDReg with BitMask and ByteMask Logic - one byte slice
17
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