MT28C3212P2FL-10B View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT28C3212P2FL-10B' PDF : 47 Pages View PDF
2 MEG x 16 PAGE FLASH
128K x 16 SRAM COMBO MEMORY
Table 15
CFI
OFFSET DATA
00
2Ch
01
A2h
A3h
02–0F reserved
10, 11 0051,0052
12
0059
13, 14 0003, 0000
15, 16 0039, 0000
17, 18 0000, 0000
19, 1A 0000, 0000
1B
0017
1C
0022
1D
00B4
1E
00C6
1F
0003
20
0000
21
0009
22
0000
23
000C
24
0000
25
26
27
28
29
2A, 2B
2C
2D, 2E
2F, 30
31, 32
33, 34
35, 36
0003
0000
0016
0001
0000
0000, 0000
0003
0037, 0000
0007, 0000
0000, 0001
0020, 0000
0006, 0000
0000, 0001
0007, 0000
0037, 0000
DESCRIPTION
Manufacturer Code
Top Boot Block Device Code
Bottom Boot Block Device Code
Reserved
“QR”
“Y”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set
Address for OEM Extended Table
VCC MIN for Erase/Write; Bit7–Bit4 Volts in BCD; Bit3–Bit0 100mV in BCD
VCC MAX for Erase/Write; Bit7–Bit4 Volts in BCD; Bit3–Bit0 100mV in BCD
VPP MIN for Erase/Write; Bit7–Bit4 Volts in Hex; Bit3–Bit0 100mV in BCD
VPP MAX for Erase/Write; Bit7–Bit4 Volts in Hex; Bit3–Bit0 100mV in BCD
Typical timeout for single byte/word program, 2n µs, 0000 = not supported
Typical timeout for maximum size multiple byte/word program, 2n µs, 0000 = not
supported
Typical timeout for individual block erase, 2n ms, 0000 = not supported
Typical timeout for full chip erase, 2n ms, 0000 = not supported
Maximum timeout for single byte/word program, 2n µs, 0000 = not supported
Maximum timeout for maximum size multiple byte/word program, 2n µs, 0000 = not
supported
Maximum timeout for individual block erase, 2n ms, 0000 = not supported
Maximum timeout for full chip erase, 2n ms, 0000 = not supported
Device size, 2n bytes
Bus Interface x8 = 0, x16 = 1, x8/x16 = 2
Flash device interface description 0000 = async
Maximum number of bytes in multi-byte program or page, 2n
Number of erase block regions within device (4K words and 32K words)
Top boot block device erase block region information 1, 8 blocks …
Bottom boot block device erase block region information 1, 8 blocks …
Top boot block device ...of 8KB
Bottom boot block device ...of 8KB
7 blocks of …
……64KB
Top boot block device 56 blocks of
Bottom boot block device 56 blocks of
(continued on the next page)
2 Meg x 16 Page Flash 128K x 16 SRAM Combo Memory
MT28C3212P2FL_2.p65 – Rev. 2, Pub. 4/02
39
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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