128Mb, 64Mb, 32Mb
Q-FLASH MEMORY
WRITE OPERATIONS1
Addresses
Note 2
VIH
VIL
VIH
Disabled
CEx (WE#) VIL
Enabled
tRS
VIH
OE#
VIL
Disabled VIH
WE# (CEx)
Enabled VIL
DQ0–DQ15 VIH
VIL
VOH
STS VOL
Note 3
AIN
tAS
Note 4
AIN
Note 5
Note 6
tAH
tCH
tWR
tCS
tWPH
tWP
tDS
tDH
tWB
VALID
VALID
BUSY SRD READY SRD
DIN
DIN
tSTS
Note 7
DIN
VIH
RP# VIL
VPENH
VPENLK
VPEN
VIL
tVPS
tVPH
UNDEFINED
TIMING PARAMETERS
SYMBOL
tRS
tCS
tWP
tDS
tAS
tCH
tDH
-11/-12/-15
MIN MAX
1
0
70
50
55
0
0
UNITS
µs
ns
ns
ns
ns
ns
ns
SYMBOL
tAH
tWPH
tVPS
tWR
tSTS
tVPH
tWB
-11/-12/-15
MIN MAX
0
30
0
35
200
0
200
UNITS
ns
ns
ns
ns
ns
ns
ns
NOTE:
1. CEx LOW is defined as the first edge of CE0, CE1, or CE2 that enables the device. CEx HIGH is defined at the first edge
of CE0, CE1, or CE2 that disables the device (see Table 2). STS is shown in its default mode (RY/BY#).
2. VCC power-up and standby.
3. Write block erase, write buffer, or program setup.
4. Write block erase or write buffer confirm, or valid address and data.
5. Automated erase delay.
6. Read status register or query data.
7. WRITE READ ARRAY command.
128Mb, 64Mb, 32Mb Q-Flash Memory
MT28F640J3_7.p65 – Rev. 6, Pub. 8/02
47
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.