128Mb, 64Mb, 32Mb
Q-FLASH MEMORY
RESET SPECIFICATIONS
(Note: 1); Commercial Temperature (0ºC ≤ TA ≤ +85ºC), Extended Temperature (-40ºC ≤ TA ≤ +85ºC)
CHARACTERISTICS
PARAMETER
RP# Pulse Low Time
(If RP# is tied to VCC, this specification is not applicable)
RP# HIGH to Reset during Block Erase, Program, or
Lock Bit Configuration
SYMBOL
tPLPH
tPHRH
-11/-12/-15
MIN
MAX
35
100
UNITS
µs
ns
NOTES
2
3
VIH
STS
VIL
VIH
RP#
VIL
RESET OPERATION4
tPHRH
tPLPH
NOTE:
1. STS is shown in its default mode (RY/BY#).
2. These specifications are valid for all product versions (packages and speeds).
3. If RP# is asserted while a BLOCK ERASE, PROGRAM, or LOCK BIT CONFIGURATION operation is not executing, then the
minimum required RP# pulse LOW time is 100ns.
4. A reset time, tPHQV, is required from the latter of STS (in RY/BY# mode) or RP# going HIGH until outputs are valid.
128Mb, 64Mb, 32Mb Q-Flash Memory
MT28F640J3_7.p65 – Rev. 6, Pub. 8/02
49
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.