NOTES (continued)
33. The clock is allowed up to ±175ps of clock to clock
jitter with a ±80ps cumulative jitter. Each AC
timing parameter is also allowed to vary by the
same amount.
34. tHP (MIN) is the lesser of tCL minimum and tCH
minimum actually applied to the device CK and
CK/ inputs, collectively during bank active.
35. READs and WRITEs with autoprecharge are not
allowed to be issued until tRAS (MIN) can be
satisfied prior to the internal precharge com-
mand being issued.
36. Impedance match output drive curves:
a) The full variation in driver pull-down current
from minimum to maximum process, tempera-
ture and voltage will lie within the outer
bounding lines of the V-I curve of Figures A
and B.
b)The variation in driver pull-down current
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figures A and B.
64Mb: x32
DDR SDRAM
c) The full variation in driver pull-up current from
minimum to maximum process, temperature
and voltage will lie within the outer bounding
lines of the V-I curve of Figures C and D.
d)The variation in driver pull-up current within
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within
the inner bounding lines of the V-I curve of
Figures C and D.
e) The full variation in the ratio of the maximum
to minimum pull-up and pull-down current
will not exceed 1.7, for device drain-to-source
voltages from 0 to VDDQ/2.
f) The full variation in the ratio of the nominal
pull-up to pull-down current should be unity
±30%, for device drain-to-source voltages from
0 to VDDQ/2.
64Mb: x32 DDR SDRAM
2M32DDR-07.p65 – Rev. 12/01
49
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©2001, Micron Technology, Inc.