NT5CC64M16DP-BE View Datasheet(PDF) - Nanya Technology
Part Name
Description
MFG CO.
'NT5CC64M16DP-BE' PDF : 138 Pages View PDF
NT5CB128M8DN/NT5CB64M16DP
NT5CC128M8DN/NT5CC64M16DP
1Gb DDR3 D-die SDRAM
Fig. 29: Write Timing Definition
CK
CK
CMD
Address
T0
Write
Bank
Col n
DQS, DQS
(tDQSS min)
DQ
DQS, DQS
(tDQSS nominal)
DQ
DQS, DQS
(tDQSS max)
DQ
T1
NOP
T2
T3
T4
T5
T6
T7
T8
T9
Tn
NOP
NOP
WL = AL + CWL
NOP
NOP
NOP
NOP
NOP
NOP
NOP
tDQSS tDSH
tWPRE(min)
tDSH
tDSH
tDSH tWPST(min)
tDSS
tDQSH tDQSL tDQSH
tDSS
tDSS
tDQSH tDQSL(min)
tDSS
Din Din
Din
Din
Din
Din
Din Din
n
n +1 n +2
n +3
n +4
n +5
n +6 n +7
tDSS
tWPRE(min)
tDSH
tDSH
tDSH
tDSS
tDSH tWPST(min)
tDQSH tDQSL tDQSH tDSS
tDSS
Din Din
Din
Din
Din
Din
n
n +1 n +2 n +3 n +4 n +5
tDSS
tDSH
tDQSS
tWPRE(min)
tDSH
tDSH
tDQSH tDQSL(min)
tDSS
Din Din
n +6 n +7
tDSH
tWPST(min)
tDSS
tDQSH tDQSL tDQSH
Din Din
Din
n
n +1 n +2
tDSS
tDSS
Din
Din
n +3 n +4
tDSS
tDQSH tDQSL(min)
Din
Din Din
n +5 n +6 n +7
tDSS
Note:
BL=8, WL=5 (AL=0, CWL=5).
Din n = data in from column n.
NOP commands are shown for ease of illustration; other command may be valid at these times.
BL8 setting activated by either MR0 [A1:0=00] or MR0 [A1:0=01] and A12 = 1 during WRITE command at T0.
tDQSS must be met at each rising clock edge.
REV 1.2
May. 2011
CONSUMER DRAM
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