NXP Semiconductors
PCF8536
Universal LCD low multiplex driver with 6 channel PWM generator
COE (1)
OSCCLK
pin
Internal oscillator
230 kHz
1
0
OSC
Programmable
divider
LCD frame frequency
selection, q
EFR (2)
0
LCD waveform
generator
1
9.6 kHz (3)
0
Programmable
1
divider
PWM frame frequency
(4)
selection, p
PWM waveform
generator
013aaa448
(1) Can only be used with the internal oscillator (OSC = 0).
(2) Can only be used with an external oscillator (OSC = 1).
(3) Nominal value for divide factor q is 24; source clock is 230 kHz (see Section 8.1.9).
(4) PWM requires an external or internal 230 kHz clock.
Fig 7. Oscillator selection
Table 11.
OSC
0
0
1
1
Valid combinations of bits OSC, EFR, and COE
COE
EFR
OSCCLK pin
0
not used inactive;
may be left floating
1
not used output of internal oscillator
frequency (prescaler)
not used 0
9.6 kHz input
not used 1
230 kHz input
Clock source
internal oscillator used
internal oscillator used
OSCCLK pin
OSCCLK pin
Table 12. Typical use of bits OSC, EFR, and COE
Usage
LCD and/or PWM with internal oscillator
LCD and PWM with external oscillator
LCD with external oscillator
OSC
0
1
1
CDE
0
not used
not used
EFR
not used
1
0
8.1.5.1 Oscillator
The internal logic and LCD drive signals of the PCF8536 are timed either by the built-in
oscillator or from an external clock.
Internal clock: When the internal oscillator is used, all LCD and PWM signals are
generated from it. The oscillator runs at nominal 230 kHz. The relationship between this
frequency and the LCD frame frequency is detailed in Section 8.1.9. The relationship
between this frequency and the PWM frame frequency is detailed in Section 8.1.10.
Control over the internal oscillator is made with the OSC bit (see Section 8.1.5). The
internal oscillator is also switched on or off under certain combinations of modes which
are described in Table 13.
PCF8536
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 October 2011
© NXP B.V. 2011. All rights reserved.
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