PI6CV857 View Datasheet(PDF) - Pericom Semiconductor
Part Name
Description
MFG CO.
'PI6CV857' PDF : 10 Pages View PDF
PI6CV857
PLL Clock Driver
for 2.5V DDR-SDRAM Memory 1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Absolute Maximum Ratings (Over operating free-air temperature range)
Symbol
Parameter
Min.
Max.
VDDQ, AVDD I/O supply voltage range and analog/core supply voltage range
– 0.5
3.6
VI
Input voltage range
VO
Output voltage range
– 0.5
– 0.5
VDDQ+0.5
Tstg
Storage temperature
– 65
150
Note: Stress beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.
Units
V
oC
Timing Requirements (Over recommended operating free-air temperature)
Symbol
fCK
Description
Operating clock frequency(1,2)
Application clock frequency(3)
AVDD, VDDQ = 2.5V ±0.2V
Min.
Max.
60
170
95
170
Units
MHz
tDC
tSTAB
Input clock duty cycle
PLL stabilization time after powerup
40
60
%
100
μs
Notes:
1. The PLL is able to handle spread spectrum induced skew.
2. Operating clock frequency indicates a range over which the PLL is able to lock, but in which the clock is not required to
meet the other timing parameters. (Used for low-speed debug).
3. Application clock frequency indicates a range over which the PLL meets all of the timing parameters.
08-0298
3
PS8464F
11/06/08
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