PM5343STXC View Datasheet(PDF) - PMC-Sierra
Part Name
Description
MFG CO.
'PM5343STXC' PDF : 198 Pages View PDF
DATA SHEET
PMC-930303
ISSUE 6
PM5343 STXC
SONET/SDH TRANSPORT OVERHEAD TRANSCEIVER
Pin Name Pin Type Pin Function
No.
RLAIS/
Input
TRCPCLK
8
The receive line AIS insertion (RLAIS) signal
controls the insertion of line AIS in the receive
outgoing stream, ROUT[7:0], when the ring
control port is disabled. When RLAIS is high,
line AIS is inserted in the outgoing stream.
Line AIS is also optionally inserted
automatically upon detection of loss of signal,
loss of frame, section trace alarms or line AIS
in the incoming stream. RLAIS is sampled on
the rising edge of RICLK.
The transmit ring control port clock (TRCPCLK)
signal provides timing for the transmit ring
control port when the ring control port is
enabled (the enabling and disabling of the ring
control port is controlled by a bit in the Master
Control Register). TRCPCLK is nominally a
3.24 MHz, 50% duty cycle clock and is
normally connected to the RRCPCLK output of
a mate STXC in ring-based add-drop
multiplexer applications. TRCPFP and
TRCPDAT are sampled on the rising edge of
TRCPCLK.
OOF
LOF
Output
Output
57 The out of frame (OOF) signal is set high while
the STXC is unable to find a valid framing
pattern (A1, A2) in the incoming stream. OOF
is set low when a valid framing pattern is
detected. OOF is updated on the rising edge
of RICLK.
56 The loss of frame (LOF) signal is set high when
an out of frame state persists for 3 ms. LOF is
set low when an in frame state persists for 3
ms. LOF is updated on the rising edge of
RICLK.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 12
Share Link: 
