PM7382-PI View Datasheet(PDF) - PMC-Sierra
Part Name
Description
MFG CO.
'PM7382-PI' PDF : 330 Pages View PDF
RELEASED
DATA SHEET
PMC-2010333
ISSUE 3
PM7382 FREEDM-32P256
FRAME ENGINE AND DATA LINK MANAGER 32P256
Pin Name Type
RFP8B
Input
RMV8FPC Input
Pin Function
No.
R21 The receive frame pulse for 8.192 Mbps H-MVIP
signal (RFP8B) references the beginning of
each frame for links configured for operation in
8.192 Mbps H-MVIP mode.
RFP8B references the beginning of a frame for
any link configured for 8.192 Mbps H-MVIP
operation. Only links 4m (0£m£7) may be
configured for 8.192 Mbps H-MVIP operation.
When one or more links are configured for
8.192 Mbps H-MVIP operation, RFP8B is
sampled on the falling edge of RMV8FPC.
When no links are configured for 8.192 Mbps H-
MVIP operation, RFP8B is ignored and should
be tied low.
P23 The receive 8.192 Mbps H-MVIP frame pulse
clock signal (RMV8FPC) provides the receive
frame pulse clock for links configured for
operation in 8.192 Mbps H-MVIP mode.
RMV8FPC is used to sample RFP8B.
RMV8FPC is nominally a 50% duty cycle, clock
with a frequency of 4.096 MHz. The falling edge
of RMV8FPC must be aligned with the falling
edge of RMV8DC with no more than ±10 ns
skew.
RMV8FPC is ignored and should be tied low
when no physical links are configured for
operation in 8.192 Mbps H-MVIP mode.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 14
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