QL6325-E-6PTN280C View Datasheet(PDF) - QuickLogic Corporation

Part Name

Description

MFG CO.

QL6325-E-6PTN280C

FPGA Combining Performance, Density, and Embedded RAM

QuickLogic Corporation 

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QL6325E Eclipse-E Data Sheet Rev. F

Figure 37: Eclipse-E Output Register Cell

PAD

OUTPUT

REGISTER

Table 19: Eclipse-E I/O Cell Output Timing

Symbol

Output Register Cell Only

Parameter

Value (ns)

Slow Slew Max

Fast Slew Max

tOUTLH

Output Delay low to high (90% of H)

4.0

tOUTHL

Output Delay high to low (10% of L)

3.5

tPZH

Output Delay tri-state to high (90% of H)

4.96

tPZL

Output Delay tri-state to low (10% of L)

4.87

tPHZ

Output Delay high to tri-state

5.8

tPLZ

Output Delay low to tri-state

5.58

tCOP

Clock-to-out delay (does not include clock tree delays)

5.49

2.95

2.49

2.93

2.84

3.62

3.4

3.3

© 2005 QuickLogic Corporation

www.quicklogic.com

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