Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
7.7.1 CLOCK PRESET REGISTER (CLOCKPRE)
This is a dual-function register. When read the status of the Q-channel is returned.
Table 55 Clock Preset Register (address 12H) - READ
7
6
5
4
3
2
1
0
Ready
Busy
CRC OK
−
−
−
−
−
Table 56 Description of ClockPre bits
BIT
7
6
5
4 to 0
SYMBOL
Ready
Busy
CRC OK
−
DESCRIPTION
If Ready = 0, then buffer filling. If Ready = 1, then valid Q subcode frame available.
If Busy = 0, then buffer filling. If Busy = 1, then buffer held (set after reading this register
with Ready = 1).
If CRC OK = 0, then CRC not checked or not OK. If CRC OK = 1, then CRC of
Q-channel checks OK, only valid if Ready = 1.
These 5 bits are reserved.
7.7.2 DECODER MODE SELECT REGISTER (DECOMODE)
This is a dual-function register. When read this register holds the Q-channel subcode data.
Table 57 Decoder Mode Select Register (address 13H) - READ
7
SubD.7
6
SubD.6
5
SubD.5
4
SubD.4
3
SubD.3
2
SubD.2
1
SubD.1
0
SubD.0
7.7.3 SUBCODE READ END REGISTER (SUBREADEND)
After finishing a subcode read, the microprocessor must release the interface to allow the SAA7392 to capture new
subcode frames. This is done by issuing a read to SubReadEnd. No data can be read from this register; only the side
effect is important.
Table 58 Subcode Read End Register (address 14H) - READ
7
6
5
4
3
2
1
0
−
−
−
−
−
−
−
−
2000 Mar 21
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