Philips Semiconductors
Channel encoder/decoder CDR60
Preliminary specification
SAA7392
7.9.1 I2S OUTPUT REGISTER (OUTPUT1)
Table 63 I2S Output Register 1 (address 05H) - WRITE
7
6
5
4
3
2
1
0
Format.2 Format.1 Format.0
WClkIO
BClkIO
−
−
−
Table 64 Description of Output1 bits
BIT
7
6
5
4
3
2 to 0
SYMBOL
Format.2
Format.1
Format.0
WClkIO
BClkIO
−
DESCRIPTION
These 3 bits select the format; see Table 65.
When WClkIO = 0, then WCLK is in Input mode. When WClkIO = 1, then WCLK is in
Output mode.
When BClkIO = 0, then BCLK is in Input mode. When BClkIO = 1, then BCLK is in
Output mode.
These 3 bits are reserved.
Table 65 Format selection
Format.2
0
0
0
0
1
1
Format.1
0
0
1
1
0
0
Format.0
0
1
0
1
0
1
FORMAT
Format 1
Format 2
Format 3
Format 4
Format 5
Format 6
7.9.2 I2S OUTPUT REGISTER 2 (OUTPUT2)
Table 66 I2S Output Register 2 (address 06H) - WRITE
7
EBUValid
6
EBUOn
5
4
EBUCon.29 EBUCon.28
3
EBUCon.3
2
EBUCon.2
1
EBUCon.1
0
EBUCon.0
Table 67 Description of Output2 bits
BIT
7
6
5
4
3 to 0
SYMBOL
DESCRIPTION
EBUValid
If EBUValid = 0, then EBU/IEC958 output data zero. If EBUValid = 1, then EBU/IEC958
output data valid.
EBUOn
If EBUOn = 0, then EBU/IEC958 output is switched off. If EBUOn = 1, then EBU/IEC958
output switched on.
EBUCon.29 These 2 bits are copied to bits 29 and 28 of the IEC958 control channel (crystal
EBUCon.28 accuracy); see Table 62.
EBUCon<3:0> These 4 bits are copied to bits 4 to 1 of the IEC958 control channel (data/audio, copy
protect, de-emphasis); see Table 62.
2000 Mar 21
37