Philips Semiconductors
Universal Timeslot Interchange
FEATURES
• Multi-time slot switching capability
for N x 64K channels (N = 1 to 32).
• Architecture optimized for the call
processing environment: SCSA ,TM
PEBTM, or MVIPTM compatible.
• Two software selectable expansion
bus formats:
• SCbusTM /ST-BUSTM
• PEB
• Two software selectable local bus
formats:
• ST-BUS
• PEB
• Enhanced input hysteresis threshold.
• 32 x 2048 channel switch
• Serial or parallel access to the SCbus.
• Internal support for SCbus clock
fallback
• Built-in SCbus message bus
interface
• Supports both Intel® and Motorola®
processor interfaces
• 68-pin PLCC package
• 5v CMOS technology
Preliminary specification
SC2000
MC Rx data
MC Tx data
Microprocessor Bus
Micro-
processor
Interface
SI
SO
Clock in
Clock Out
Local
Bus
Interface
Block Diagram
CLKFAIL&
MC bus
Configuration
registers
Parallel
Access
Registers
Routing
Memory
Switch
Matrix
Timing
CLKFAIL
MC
0.995 [25.27]
0.985 [25.02]
0.800 [20.32] REF
Expansion
Bus
Interface
Expansion Serial Bus
Expansion Clock Out
0.995 [25.27]
0.985 [25.02]
0.800 [20.32]
REF
PIN 1
INDEX
0.048 [1.22]
0.042 [1.07]
0.056 [1.42]
0.042 [1.07]
0.200 [5.08]
0.165 [4.19]
0.130 [3.30]
0.090 [2.29]
Package Mechanical Drawing
2000 Sep 07
3