Architecture overview
SPEAr300
Main features:
● Supports the following SPI-compatible Flash and EEPROM devices:
– STMicroelectronics M25Pxxx, M45Pxxx
– STMicroelectronics M95xxx, except M95040, M95020 and M95010
– ATMEL AT25Fxx
– YMC Y25Fxx
– SST SST25LFxx
● Acts always as a SPI master and up to 2 SPI slave memory devices are supported
(through as many chip select signals), with up to 16 MB address space each
● SMI clock signal (SMICLK) is generated by SMI (and input to all slaves)
● SMICLK can be up to 50 MHz in fast read mode (or 20 MHz in normal mode). It can be
controlled by 7 programmable bits.
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Doc ID 16324 Rev 2