SPEAR300-2 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
SPEAR300-2
STMicroelectronics
'SPEAR300-2' PDF : 83 Pages View PDF
Table 11. PL_GPIO multiplexing scheme
Configuration mode (enabled by RAS register 2)
PL_GPIO_# /
ball number
1
2
3
4
5
6
7
8
9
10
11
12
PL_GPIO_97/H16 /E1
/E1
/E1
PL_GPIO_96/H15
D0
DQ0
D0
PL_GPIO_95/H14
D1
DQ1
D1
PL_GPIO_94/H13
D2
DQ2
D2
PL_GPIO_93/G17 D3
DQ3
D3
PL_GPIO_92/G16 D4
DQ4
D4
PL_GPIO_91/G15 D5
DQ5
D5
PL_GPIO_90/G14 D6
DQ6
D6
PL_GPIO_89/F17
D7
DQ7
D7
PL_GPIO_88/F16
D8
DQ8
D8
PL_GPIO_87/G13 D9
DQ9
D9
PL_GPIO_86/E17 D10
DQ10
D10
PL_GPIO_85/F15 D11
DQ11
D11
PL_GPIO_84/D17 D12
DQ12
D12
PL_GPIO_83/E16 D13
DQ13
D13
PL_GPIO_82/E15 D14
DQ14
D14
PL_GPIO_81/C17 D15 DQ15 A-1 D15
PL_GPIO_80/D16
0
A0
CLD0
PL_GPIO_79/F14
0
A1
CLD1
PL_GPIO_78/D15
0
A2
CLD2
PL_GPIO_77/B17
0
A3
CLD3
PL_GPIO_76/F13
0
A4
CLD4
PL_GPIO_75/E14
0
A5
CLD5
PL_GPIO_74/C16
0
A6
CLD6
1
COL0
COL1
COL2
COL3
COL4
COL5
COL6
COL7
COL8
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
ROW6
G8_0 (out)
G8_1 (out)
G8_2 (out)
G8_3 (out)
G8_4(out)
G8_5
(out)
G8_6 (out)
1
COL0
COL1
COL2
COL3
COL4
COL5
COL6
COL7
COL8
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
ROW6
CLD0
CLD1
CLD2
CLD3
CLD4
CLD5
CLD6
1
COL0
COL1
COL2
COL3
COL4
COL5
COL6
COL7
COL8
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
ROW6
0
0
0
0
0
0
0
1
COL0
COL1
COL2
COL3
COL4
COL5
COL6
COL7
COL8
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
ROW6
CLD0
CLD1
CLD2
CLD3
CLD4
CLD5
CLD6
/E1
D0
D1
D2
D3
D4
D5
D6
D7
G8_0
G8_1
G8_2
G8_3
G8_4
G8_5
G8_6
G8_7
A0
A1
A2
A3
A4
A5
A6
/E1
D0
D1
D2
D3
D4
D5
D6
D7
G8_0
G8_1
G8_2
G8_3
G8_4
G8_5
G8_6
G8_7
A0
A1
A2
A3
A4
A5
A6
1
COL0
COL1
COL2
COL3
COL4
COL5
COL6
COL7
COL8
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
ROW6
Reserved
Reserved
Reserved
Reserved
Reserved
1
COL0
COL1
COL2
COL3
COL4
DIO0_1
DIO1_1
DIO2_1
DIO3_1
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
ROW6
CLD0
CLD1
CLD2
CLD3
CLD4
1
COL0
COL1
COL2
COL3
COL4
DIO0_1
DIO1_1
DIO2_1
DIO3_1
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
ROW6
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved CLD5 Reserved
Reserved CLD6 Reserved
Alternate
function
(enabled
13
by RAS
register 1)
1
COL0
COL1
COL2
COL3
COL4
COL5
COL6
COL7
COL8
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
ROW6
CLD0
CLD1
CLD2
CLD3
CLD4
CLD5
CLD6
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