SPEAR300-2 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
SPEAR300-2
STMicroelectronics
'SPEAR300-2' PDF : 83 Pages View PDF
Memory mapping
4
Memory mapping
SPEAr300
Table 14. Memory mapping
Start address End address
0x0000.0000
0x4000.0000
0x5000.0000
0x5001.0000
0x5003.0000
0x5004.0000
0x5005.0000
0x5005.1000
0x6000.0000
0x7000.0000
0x8000.0000
0x8400.0000
0x8800.0000
0x8C00.0000
0x9000.0000
0x9100.0000
0x9200.0000
0x9300.0000
0x9400.0000
0x9900.0000
0xA000.0000
0xA900.0000
0xB000.0000
0xC000.0000
0xD000.0000
0xD008.0000
0xD010.0000
0xD018.0000
0xD020.0000
0xD080.0000
0xD100.0000
0xD180.0000
0x3FFF.FFFF
0x4FFF.FFFF
0x5000.FFFF
0x5001.0FFF
0x5003.7FFF
0x5004.0FFF
0x5005.0FFF
0x5005.1FFF
0x6FFF.FFFF
0x7FFF.FFFF
0x83FF.FFFF
0x87FF.FFFF
0x8BFF.FFFF
0x8FFF.FFFF
0x90FF.FFFF
0x91FF.FFFF
0x91FF.FFFF
0x93FF.FFFF
0x98FF.FFFF
0x9FFF.FFFF
0xA8FF.FFFF
0xAFFF.FFFF
0xBFFF.FFFF
0xCFFF.FFFF
0xD007.FFFF
0xD00F.FFFF
0xD017.FFFF
0xD01F.FFFF
0xD07F.FFFF
0xD0FF.FFFF
0xD17F.FFFF
0xD1FF.FFFF
Peripheral
External DRAM
C3
Telecom register
TDM
TDM
TDM
I2S
I2S
CLCD
SDIO
Static memory controller
Static memory controller
Static memory controller
Static memory controller
Static memory controller
Static memory controller
Static memory controller
Static memory controller
Static memory controller
Registers
Keyboard
GPIO
-
-
UART
ADC
SPI
I2C
-
JPEG CODEC
IrDA
-
Description
Low power DDR or DDR2
Action memory
Buffer memory
Sync memory
I2S memory bank 1
I2S memory bank 2
NAND bank0
NAND bank1
NAND bank2
NAND bank3
NOR bank0
NOR bank1
NOR bank2
NOR bank3
Register
Reserved
Reserved
Reserved
Reserved
50/83
Doc ID 16324 Rev 2
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