ST18-AU1
8 INTERRUPT CONTROLLER
The interrupt controller (ITC) manages the interrupts from the clocks and timers unit, the host
interface, and the external interrupt for the DSP core. The interrupt controller also manages
input/output buffer overflow/underflow interrupts.
The interrupt controller has the following features:
• 8 interrupt sources
• interrupts can be individually enabled by software
• priority level between different sources can be set by software
• interrupt can be activated and programmed as edge or level triggered.
The interrupt controller ITRQ inputs are connected to one external interrupt request (IRQ pin)
and to internal peripheral requests, as detailed in the table below.
Table 8.1
Interrupt assignments
Interrupt
Assignment
ITRQ0
Host interface
ITRQ1
Input FIFO
ITRQ2
Input buffer
ITRQ3
Output buffer
ITRQ4
Clock timer IRQ
ITRQ5
SPDIF timer IRQ
ITRQ6
DMA controller
ITRQ7
connected to the external IRQ pin
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