ST40RA166 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST40RA166' PDF : 88 Pages View PDF
4 System configuration
ST40RA166
4.8.4.2 SYSCONF.SYSCONF1.
[3:0]
[10:4]
[17:11]
[24:18]
[38:25]
[45:39]
[52:46]
[63:53]
SYSCONF.SYSCONF1 Memory bridge control
Reserved
MB1
MB2
MB3
Reserved
MB6
MB7
Reserved
Memory bridge 1 control: EMI target
Memory bridge 2 control: EMPI initiator
Memory bridge 3 control: EMI_SS target
Memory bridge 6 control: PCI initiator
Memory bridge 7 control: PCI target
0x010
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Where the two clocks are sourced from independent PLLs the bridge must be put in asynchronous
mode.
4.8.5 SYSCONF.SYSCONF2.
SYSCONF.SYS_CON2
Functional pin use and behavior
The SYSCONF.SYS_CON2 register controls functional pin use and behavior
8 LMI_MODE
LMI pad type
0: SSTL
1: LVTTL
Reset: 0
9 LMI_ENVREF
Reference voltage source
0: internally generated reference voltage
1: external reference voltage from VREF pins
Reset: 0
10 LMI_ECLK_BYPASS
LMI control signal ECLK180 retime bypass
0: ECLK180 flip flop not bypassed
1: ECLK180 flip flop is bypassed
Reset: 0
11 LMI_NOTCOMP25_EN
Enable LMI 2.5 V compensation cell
0: LMI 2.5 V compensation cell enabled
1: LMI 2.5 V compensation cell disabled
Reset: 0
12 LMI_COMP33_EN
Enable LMI 3.3 V compensation cell
0: LMI 2.5 V compensation cell enabled
1: LMI 2.5 V compensation cell disabled
Reset: 0
Table 10:
0x0018
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