4 System configuration
ST40RA166
SYSCONF.SYS_CON2
[41:43] Reserved
[44:46] EMPI_CS_ENB
47 SEL_EXT_EMI_SLAVE
[48:59] Reserved
[60:63] PIO_CONF
Functional pin use and behavior
Enable EMPI chip selection alternate function
000: NOTESC0 remapped to NOTEMPICS
001: NOTESC1 remapped to NOTEMPICS
010: NOTESC2 remapped to NOTEMPICS
011: NOTESC3 remapped to NOTEMPICS
100: NOTESC4 remapped to NOTEMPICS
101: NOTESC5 remapped to NOTEMPICS
110: Reserved
111: Disabled (value at reset)
Select EMI slave or master functionality
0: EMI is bus master
1: EMI is bus slave
PIO_CONF
Table 10:
0x0018
RW
RW
RW
4.8.6
PIO alternate functions
The function of pads with PIO alternate functions are controlled by the PIO.PC0, PIO.PC1 and PIO.PC2
registers.
In the ST40RA166 device, the operational modes for these registers differ from the standard
architecture definition and are shown in Table 11.
PIO bit configuration
PIO output state
PIO.PC2
NonPIO functiona
PIO bidirectional
PIO output
PIO bidirectional
PIO input
PIO input
Reserved
Reserved
-
0
Open drain
0
Push-pull
0
Open drain
0
High impedance
1
High impedance
1
-
1
-
1
Table 11: PIO alternate function registers
a. State following reset
PIO.PC1
0
0
1
1
0
0
1
1
PIO.PC0
0
1
0
1
0
1
0
1
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