ST70135 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST70135' PDF : 29 Pages View PDF
ST70135A
The ST70135A samples TxData and TxSOC
signals on the rising edge of TxClk, if TxEnb is
asserted.
TxClk, RxClk, AC Electrical Characteristics
Symbol
Parameters
Min Max Unit
F
Clock frequency
1.5 25 MHz
Tc
Clock duty cycle
40
60
%
Tj
Clock peak to peak
jitter
5
%
Trf
Clock rise fall time
4
ns
L
Load
100 pF
TxData, TxSOC, AC Electrical Characteristics
Symbol
Parameters
Min Max Unit
T5
Input set-up time to 10
ns
TxClk
T6
Hold time to TxClk 1
ns
L
Load
100 pF
Figure 15 : Timing (Utopia 1 Transmit Interface)
RxData, RxSOC, RxClav AC Electrical
Characteristics
Symbol
Parameters
Min Max Unit
T7
Input set-up time to 10
ns
TxClk
T8
Hold time to Tx Clk 1
ns
T9
Signal going low
10
ns
impedance to
RxClk
T10
Signal going High
0
ns
impedance to
RxClk
T11
Signal going low
1
ns
impedance to
RxClk
T12
Signal going High
1
ns
impedance to
RxClk
L
Load
100 pF
TxCLK
TxSOC
TxENB
TxDATA
X
H1
H2
P44
P45
P46
P47
P48
X
TxCLAV
Figure 16 : Timing Specification (Utopia 1)
Clock
Signal
(at input)
Signal
(highz)
T5, T7
T6, T8
T11
T9
T12
T10
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