Instruction set
12 Instruction set
ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
12.1
ST7 addressing modes
The ST7 Core features 17 different addressing modes which can be classified in seven main
groups:
T:able 48. Addressing mode groups
Addressing mode
Example
Inherent
Immediate
Direct
Indexed
Indirect
Relative
Bit operation
nop
ld A,#$55
ld A,$55
ld A,($55,X)
ld A,([$55],X)
jrne loop
bset byte,#5
The ST7 Instruction set is designed to minimize the number of bytes required per
instruction: To do so, most of the addressing modes may be subdivided in two submodes
called long and short:
● Long addressing mode is more powerful because it can use the full 64 Kbyte address
space, however it uses more bytes and more CPU cycles.
● Short addressing mode is less powerful because it can generally only access page
zero (0000h00FFh range), but the instruction size is more compact, and faster. All
memory to memory instructions use short addressing modes only (CLR, CPL, NEG,
BSET, BRES, BTJT, BTJF, INC, DEC, RLC, RRC, SLL, SRL, SRA, SWAP).
The ST7 Assembler optimizes the use of long and short addressing modes.
Table 49. ST7 addressing mode overview
Mode
Syntax
Destination/
Pointer
Pointer
Length (bytes)
source address (Hex.) size (Hex.)
Inherent
−
− nop
−
−
−
+0
Immediate −
− ld A,#$55
−
−
−
+1
Short
Direct
− ld A,$10
00..FF
−
−
+1
Long
Direct
− ld A,$1000
0000..FFFF
−
−
+2
No offset Direct Indexed ld A,(X)
00..FF
+ 0 (with x register)
−
−
+ 1 (with Y register)
Short
Direct Indexed ld A,($10,X)
00..1FE
−
−
+1
Long
Direct Indexed ld A,($1000,X) 0000..FFFF
−
−
+2
Short
Indirect − ld A,[$10]
00..FF
00..FF
byte
+2
Long
Indirect − ld A,[$10.w]
0000..FFFF
00..FF
word
+2
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Doc ID 8349 Rev 5