STA310 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STA310' PDF : 90 Pages View PDF
STA310
Software Reset: NA
Hardware Reset: NA
Description:
This version register is read only and is used to iden-
tify the audio hardware version. The version register
holds a number which refers to the cut number. The
version numbers are defined as below:
- STA310 cut 1.0, version number is : 0x10
- STA310 cut 2.0, version number is : 0x10
9.4 SETUP & INPUT REGISTERS
The STA310 can get receive an input bitstream either
from the I2s input or ffrom the Spdif input, the selec-
tion and the configuration is done through 2 registers
SIN_SETUP @ 12 and CAN_SETUP @ 13.
SIN SETUP
Input data setup
7654
3
2
1
0
SPDIF POL IMODE [1...0]
Address: 0x0C
Type: R/W
Software Reset: NC
Hardware Reset: 0
Description:
This register is used to configure the input data inter-
face. The register must be setup before sending data
to the IC. The mapping of the register isescribed be-
low. Remember that the data must be sent to the de-
vice MSB first.
- SPDIF data frpm SPDIF when set to 1, data
from main I2S input.
- POL Polarity of the REQ signal. When set,
the REQ pin is active low: data must be input
when REQ is low. When reset, the REQ pin is
active high and data must be input when REQ
is high.
- IMODE[1...0] Input mode. Indicates which
data input interface is used.
The configuration of the 3 possible interfaces is
shown below:
IMODE[1:0]
Mode
0
Parallel input (DSTR+Data [7:0] + REQ)
1
Serial input (DSTR + SIN + REQ)
2
Reserved - Not used
3
A/D input (DSTR+LRCLKIN+REQ+SIN;
SPDIF input; PCM input
When the IC is configured in mode 1 or 3, the
CAN_SETUP register is used to configure the IC with
repect to the data format.
CAN_SETUP
A/D converter setup
7
6
5
4
Address : 0x0D
Type: R/W
Software Reset: NC
Hardware Reset: 0
3
2
1
0
S16 SAM FIR PAD
Description:
CAN_SETUP is used to configure the data serial in-
terface. The register is only taken into account when
the register sin_setup [1...0] = 3.
Also see SIN_SETUP register./
- S16 When set, the slot count is 16. When re-
set, the slot count is 32 but only the first 16
are extracted.
- SAM When set data is sampled on the falling
edge of the DSTR. When reset, the data is
sampled on the rising edge of DSTR
- FIR When set the first channel (Left) is input
when Lrclkin=1. When reset, the first channel
is input when Lrclkin=0.
- PAD When set, data Lrclkin is delayed by one
cycle (padding mode).
When the IC is configured with the S/PDIF input, reg-
ister CAN_SETUP must be set to 2
DATAIN
Data input
7
6
5
4
3
2
1
0
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