Serial host interface
STLC4420A
register the contents of subsequent DMA read accesses are unpredictable until the DMA is
disabled and restarted.
4.8
Host multi-word reads
The Host may read from multiple consecutive 16-bit registers by keeping SPI_CSX asserted
and continuing to toggle SPI_CLK after the initial 16-bit data phase has completed.
The register address is incremented by 2 at the end of each data phase for all register
address except the DMA data register.
Figure 20. Serial host multi-word read
Consecutive reads from the DMA data register are read from the DMA data register with no
address increment.
Figure 21. Serial host multi-word read DMA data
28/40