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STW81103 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
'STW81103' PDF : 53 Pages View PDF
Circuit description
STW81103
5.8.3
The SERCAL bit should be set to “1” at each division ratio change. The VCO calibration
procedure takes approximately 7 periods of the PFD frequency.
The maximum allowed FPFD to perform the calibration process is 1 MHz. When using a
higher FPFD, follow the steps below:
1. Calibrate the VCO at the desired frequency with an FPFD less than 1 MHz.
2. Set the ratio of the A, B and R dividers for the desired FPFD.
VCO calibration auto-restart feature
The VCO calibration auto-restart feature, once activated, allows to restart the calibration
procedure when the lock detector reports that the PLL has moved to an unlock condition
(trigger on ‘1’ to ‘0’ transition of lock detector signal).
This situation could happen if the device experiences a significant temperature variation.
Once programmed at the initial temperature T0 inside the operating temperature range
(-40 °C to +85 °C), the synthesizer is able to maintain the lock status only if the temperature
drift (in either direction) is within the limit specified by the ΔTLK parameter, provided that the
final temperature T1 is still inside the nominal range.
Each VCO featured by STW81103 has its specific ΔTLK parameter reported in Table 5, that
is typically lower than the maximum allowable drift (ΔTMAX=125; from -40 °C to +85 °C and
vice versa).
By enabling the VCO calibration auto-restart feature (through the CAL_AUTOSTART_EN
bit), the part will be able to select again the proper VCO frequency sub-range if the
temperature drift exceeds the ΔTLK limit, without any external user command.
VCO voltage amplitude control
The voltage swing of the VCOs can be adjusted over four levels by means of two dedicated
programming bits (PLL_A1 and PLL_A0). Higher amplitudes provide best phase noise,
whereas lower amplitudes save power.
Table 8 gives the voltage swing level expected on the resonator nodes, the current
consumption, and the phase noise at 1 MHz.
Table 8. VCO A performances versus amplitude setting (Freq = 2.8 GHz)
PLL_A[1:0]
Differential
voltage swing (Vp)
Current
consumption (mA)
PN @1 MHz (dBc/Hz)
00
1.1
16
-126
01
1.3
19
-127
10
1.9
27
-130
11
2.1
30
-131
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