VG4616321B View Datasheet(PDF) - Vanguard International Semiconductor
Part Name
Description
MFG CO.
'VG4616321B' PDF : 82 Pages View PDF
VIS
Preliminary
VG4616321B/VG4616322B
262,144x32x2-Bit
CMOS Synchronous Graphic RAM
Recommended D.C. Operating Conditions (VDD = 3.3V ± 0.3V, Ta = 0 ~ 70¢J)
Description/test condition
-5
-6
-7
Unit Note
Symbol Min. Max. Min. Max. Min. Max.
Operating Current
tRC ≥ tRC (min) , Outputs Open
Address changed once during tCK(min).
Burst Length = 1
1 bank
operation
IDD1
190
170
150
3,4
Precharge Standby Current in non-power down mode
tCK = tCK(min), CS ≥ VIH(min), CKE ≥ VIH (min)
Input signals are changed once during 30ns.
IDD2N
35
35
35
3
Precharge Standby Current in non-power down mode
tCK = ∞ , CKE ≥ VIH (min), CLK ≤ VIL (max)
Input signals are stable
IDD2NS
15
15
15
mA
Precharge Standby Current in power down mode
tCK = tCK(min), CKE ≤ VIL (max)
IDD2P
2.0
2.0
2.0
3
Precharge Standby Current in power down mode
tCK = ∞ , CKE ≤ VIL (max), CLK ≤ VIL (max)
IDD2PS
2.0
2.0
2.0
Active Standby Current in non power down mode
≥ C K E VIH (min), tCK = tCK(min)
IDD3P
4
4
4
3
Active Standby Current in power down mode
≤ ≥ CKE VIL (max), tCK = tCK(min), CS VIH(min)
IDD3N
30
30
30
Operating Current (Page Burst, and All Bank activated)
IDD4
220
200
170
4,5
tCCD = tCCD(min), Outputs Open, Multi-bank interleave, gapless
data
Refresh Current
tRC ≥ tRC (min)
IDD5
190
170
140
3
Self Refresh Current
CKE ≤ 0.2V
IDD6
1
1
1
Operating Current (Block Write)
tCK = tCK(min), Outputs Open, tBWC = tBWC(min)
IDD7
250
230
190
Parameter
IIL
IOL
VOH
VOL
VOH
VOL
Description
Input Leakage Current
(0V ≤ VIN ≤ VDD All other pins not under test = OV)
Output Leakage Current
Output disable, ( 0V ≤ VOUT ≤ VDDQ )
LVTTL Output ”H” Level Voltage
(lOUT = -2mA)
LVTTL Output ”L” Level Voltage
(lOUT = 2mA)
SSTL Output ”H” Level Voltage
(lOUT = -16mA)
SSTL Output ”L” Level Voltage
(lOUT = 16mA)
Min.
-5
-5
2.4
-
VTT+0.8
-
Max.
5
5
Unit Note
µA
µA
-
V
0.4
V
-
V
VTT+0.8
V
Document:1G5-0145
Rev.1
Page 22
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