VV5801C001 View Datasheet(PDF) - Vision

Part Name

Description

MFG CO.

VV5801C001

High resolution CMOS 1300K Pixel Image Sensor with support for external FPN cancellation and serial interface control, available in colour (VV6801) and monochrome (VV5801) versions.

Vision

'VV5801C001' PDF : 23 Pages View PDF

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VISION VV6801/5801 PRELIMINARY CUSTOMER DATASHEET Rev 1.1
7.5.2 Horizontal Cine Mode (1/2 subsampled)
Description
#t
PCK Cycles Time (us) @5MHz
SELREF [R] -Start of line
c0
0
0
CLAMP [R] (See note)
c1
1
0.2
EVEN [T]
c2
0
0
LCK [R]
c3
4
0.8
LCK [F]
c4
5
1
PXRD [R]
c5
34
6.8
COLSAM [R]
c6
COLSAM [F]
c7
CLAMP [F]
c8
SELREF [F]
c9
EC [R], PXRD[F] c10
LS [R] (even pixels) c11
LS [F] (even pixels) c12
AVO valid, even pixels start c13
AVO valid, even pixels end c14
EC [F] c15
LS [R] (odd pixels) c16
LS [F] (odd pixels) c17
35
7
204
40.8
205
41
206
41.2
y 207
41.4
208
41.6
r212
42.4
212.5
42.5
a470.5
94.1
472
94.4
473
94.6
in477
95.4
AVO valid, odd pixels start
AVO valid, odd pixels end
End of line
SELREF [R] -Start of next line
lim Setup times:
Line Length
EVEN[T] - LCK[R] setup time
LCK duration
eLCK[F] - PXRD[F]
PXRD[R] - COLsam[R] setup
rCOLsam duration
COLsam[R] - CLAMP [F]
PCLAMP[H] Duration
c18
c19
c21
c21-c0
c3-c2
c4-c3
c10-c4
c6-c5
c7-c6
c8-c7
c8-c1
477.5
735.5
739
740
624
4
1
202
1
169
1
204
95.5
147.1
147.8
148
124.8
0.8
0.2
40.4
0.2
33.8
0.2
40.8
SELRef[H] Duration c9-c0
206
41.2
SELRef overlap of CLAMP c1-c0,c9-c8
1
0.2
SELRef[F] - EC[R] c10-c9
1
0.2
COLsam[F] - EC[R] c10-c7
3
0.6
EC[T] - LS[R]: even c11-c10
1
0.2
EC[T] - LS[R]: odd c16-c15
1
0.2
LS[H] duration: even c12-c11
4
0.8
LS[H] duration: odd c17-c16
4
0.8
LS[F] to first valid even pixel c13-c12
0.5
0.1
LS[F] to first valid odd pixel c18-c17
0.5
0.1
Valid pixels: even c14-c13
258
51.6
Valid pixels: odd c19-c18
258
51.6
PXRD[F] - SELref[R] (next line) c21-c10
532
106.4
Table 7.6 : Recommended Line timings in Horizontal Cine Mode
Note: CLAMP is asserted only during the clamping line, in the case of frame rate clampling, or during every
line, in the case of line rate clamping.
Note: All input signals should change on the Falling Edge of PCK, except LS (see Section 7.2).
cd24082b.fm
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VISION VV6801/5801 PRELIMINARY CUSTOMER DATASHEET Rev 1.1
7.6 Line Timing using CDSR
The following timing details relate to Correlated Double Sampling on a line by line basis, that is using the
CDSR signal to reset a line of pixels without advancing the VSR. The image capture part of the double read
is exactly as described above, and all setup times and durations other than CDSR specific times are also
identical. See Section 5.2 for full details.
Preliminary
cd24082b.fm
09/09/98: PRELIMINARY
34

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