VV5801C001 View Datasheet(PDF) - Vision

Part Name

Description

MFG CO.

VV5801C001

High resolution CMOS 1300K Pixel Image Sensor with support for external FPN cancellation and serial interface control, available in colour (VV6801) and monochrome (VV5801) versions.

Vision

'VV5801C001' PDF : 23 Pages View PDF

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VISION VV6801/5801 PRELIMINARY CUSTOMER DATASHEET Rev 1.1
9. Pin descriptions and Package Details
53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
SAMref 54
SELref 55
CLAMP 56
COLsam 57
EC 58
‘TOP’
LS 59
PCK 60
DCK 61
DLAT 62
DIN 63
y DOUT 64
RSTB 65
r HCLRB 66
VCLRB 67
a VSETB 68
FI 69
FR 70
in EVEN 71
PXRD 72
CDSR 73
LCK 74
lim Viewed from top of package
75 76 77 78 79 80 81 82 83 84 1 2 3 4 5 6 7 8 9 10 11
eFigure 9.1 : 84 LCC Pinout
Pr For BGA pinout details, please contact VLSI VISION.
32 AVDD2
31 AVO
30 AVSS1
29 AVORef
28 AVDD1
27 VDiffRef
26 Vdac
25 VCL1
24 VCL2
23 Vdac3/4
22 Vdactop
21 Vbltwref
20 Vblmref
19 VRTref
18 AVCC3
17 Vnb
16 Rset
15 Vbg
14 AGND3
13 Vblwt
12 Vbloom
Index
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VISION VV6801/5801 PRELIMINARY CUSTOMER DATASHEET Rev 1.1
9.1 Pin List
Pin
Name Type
Function/Comment
POWER SUPPLIES
51, 35, 18 AVCC1-3 PWR 5V supply for the Column Source Followers.
50,36, 14 AGND1-3 GND Ground for the Substrate and the Column Source Followers.
28, 32
30
AVDD1,2 PWR 5V supply for the Output Stage.
AVSS1 GND Ground supply for the Output Stage.
75, 11
76, 10
33
34
53
52
65
77, 9
12
13
19
20
21
15
17
16
25
DVDD1,2
DVSS1,2
DVDD3
DVSS3
DVDD4
DVSS4
RSTB
PWR
GND
PWR
GND
PWR
GND
OD
5V supply for Vertical Shift Registers
Ground for Vertical Shift Registers
5V supply for Output Muxing.
y Ground for Output Muxing.
r 5V supply for Horizontal Shift Register.
Ground for Horizontal Shift Register.
a POWER-ON-RESET
in Output of internal power-on-reset cell. Should be applied to
VRT1,2
lim Vbloom
Vbltw
VRTref
e Vblmref
r Vbltwref
PVbg
HCLRB and VCLRB at power up.
ANALOGUE VOLTAGE REFERENCES
IA
Pixel Reset Voltage and Power Supply.
IA
Anti-blooming pixel reset voltage.
IA
Defines white level for the Bitline test.
OA Unbuffered Internally generated Reference for VRT
OA Unbuffered Internally generated Reference for Vbloom
OA Unbuffered Internally generated Reference for Vbltw.
OA Internal bandgap voltage reference (1.22 V); decouple with 10nF
Vnb
IA
Decoupling (10nF) for internally generated bias current
Rset
IA
Sets internal master bias current; connect to AGND via 12K Res.
VCL1
IA
AC Clamp Voltage for AVO output.
26
VCL2
IA
AC Clamp Voltage for AVORef output.
ANALOGUE OUTPUT STAGE
31
AVO
OA Buffered analogue video output; Inverted - low = white
29
AVORef OA Buffered black level voltage reference.
55
SELRef ID
SELRef=0 - Selects sensor output (video) at AVO.
SELRef=1 - Selects ‘Line Reference’
54
SAMRef ID
Samples the ‘Line Reference’ from VRT
56
CLAMP ID
Controls AC Clamping circuit in output stage.
RESET AND READ VERTICAL SHIFT REGISTERS (VSR)
74
LCK
ID
Line clock input for Reset and Read Vertical Shift Registers
71
EVEN
ID
ODD/EVEN Line Clock.
72
PXRD
ID
Pixel Read: Control input to read a row of pixel voltages.
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