XR16C872
Preliminary
UART INTERNAL REGISTERS (CONT'D)
A2 A1 A0
Register
[Default]
Note *3
BIT-7
BIT-6
BIT-5
BIT-4
BIT-3
BIT-2
BIT-1
BIT-0
Enhanced Registers are accessible only when LCR is set to 0xBF.
0 0 0 TRG [00]
Trig/
Trig/
Trig/
Trig/
Trig
Trig/
Trig/
Trig/
FC
FC
FC
FC
FC
FC
FC
FC
001
010
FCTR [00]
EFR [00]
Rx/Tx
Mode
Auto
CTS
SPR/EMSR
Select
Auto
RTS
Trig
bit-1
Special
Char.
select
Trig RS485
bit-0
Auto
control
1111111111111111111111I2222222222222222222222SbIbE3333333333333333333333Ei4444444444444444444444MRitntR5555555555555555555555s4s,6666666666666666666666aC-7777777777777777777777F47b5b8888888888888888888888R-C,9999999999999999999999i-l5te00000000000000000000007sR1111111111111111111111, 22222222222222222222223333333333333333333333
Cont-3
Tx,Rx
Control
IrRx
RTS
RTS
Inv. Hysteresis Hysteresis
bit-1
bit-0
Cont-2
Tx,Rx
Control
Cont-1
Tx,Rx
Control
Cont-0
Tx,Rx
Control
1 0 0 Xon-1[00] bit-7
bit-6
bit-5
bit-4
bit-3
bit-2
bit-1
bit-0
1 0 1 Xon-2[00] bit-15 bit-14 bit-13 bit-12 bit-11 bit-10
bit-9
bit-8
110
111
Xoff-1[00]
Xoff-2[00]
bit-7
bit-15
bit-6
bit-14
bit-5
bit-13
bit-4
bit-12
bit-3
bit-11
bit-2
bit-10
bit-1
bit-9
bit-0
bit-8
EMSR Register is accessible only when FCTR bit 6 is set to logic 1.
1 1 1 EMSR [00] Not
Used
Not
Used
RTS
RTS Reserved Reserved
Hysteresis Hysteresis
bit-3
bit-2
ALT.
Rx/Tx
FIFO
Count
Rx/Tx
FIFO
Count
Note:
*3 - The value represents the register’s initialized HEX value. An “X” signifies a 4-bit un-initialized nibble.
Rev. P1.00
26