Qdatasheet_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

XRT83SH38ES View Datasheet(PDF) - Exar Corporation

Part Name
Description
MFG CO.
'XRT83SH38ES' PDF : 78 Pages View PDF
XRT83SH38
REV. 1.0.7
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
2.0 MASTER CLOCK GENERATOR
Using a variety of external clock sources, the on-chip frequency synthesizer generates the T1 (1.544MHz) or
E1 (2.048MHz) master clocks necessary for the transmit pulse shaping and receive clock recovery circuit.
There are two master clock inputs MCLKE1 and MCLKT1. In systems where both T1 and E1 master clocks are
available these clocks can be connected to the respective pins. All channels of a given XRT83SH38 must be
operated at the same clock rate, either T1, E1 or J1 modes. In systems that have only one master clock
source available (E1 or T1), that clock should be connected to both MCLKE1 and MCLKT1 inputs for proper
operation. T1 or E1 master clocks can be generated from 8kHz, 16kHz, 56kHz, 64kHz, 128kHz and 256kHz
external clocks under the control of CLKSEL[2:0] inputs according to EQC[4:0] determine the T1/E1 operating
mode. See for details.
FIGURE 3. TWO INPUT CLOCK SOURCE
2.048MHz
+/-50ppm
1.544MHz
+/-50ppm
Two Input Clock Sources
MCLKE1
MCLKT1
MCLKOUT
1.544MHz
or
2.048MHz
FIGURE 4. ONE INPUT CLOCK SOURCE
Input Clock Options
8kHz
16kHz
56kHz
64kHz
128kHz
256kHz
1.544MHz
2.048MHz
One Input Clock Source
MCLKE1
MCLKT1
MCLKOUT
1.544MHz
or
2.048MHz
MCLKE1
KHZ
2048
2048
2048
1544
1544
2048
8
8
MCLKT1
KHZ
2048
2048
1544
1544
1544
1544
x
x
TABLE 2: MASTER CLOCK GENERATOR
CLKSEL2
CLKSEL1
CLKSEL0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
1
0
0
1
0
MCLKRATE
0
1
0
1
0
1
0
1
MASTER CLOCK
KHZ
2048
1544
2048
1544
2048
1544
2048
1544
20
Share Link: GO URL

All Rights Reserved © qdatasheet.com  [ Privacy Policy ] [ Contact Us ]