XRT84L38 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT84L38' PDF : 453 Pages View PDF
XRT84L38
OCTAL T1/E1/J1 FRAMER
REV. 1.0.1
• Flip-flop types of registers
• RAMs
The configuration of the Framer, including the enabling/disabling of interrupts, is selected by setting values in
various control registers. The registers can be read as well as written. The Framer can be designed into both
polled and interrupt-driven systems. All detection of change of state of alarm conditions, data link events, error
events, or counter overflows can be programmed to cause interrupts.
The Microcontroller Interface Block within the Framer supports three types of data transfer schemes:
• Programmable Input/Output (PIO)
• Burst Transfer
• DMA (Direct Memory Access)
Each of these data transfer methods are also discussed in the next sections.
1.1 Channel Selection within the Framer
The XRT84L38 Framer consists of eight independent banks of configuration registers. Each of these banks are
identical and correspond to each of the eight channels within the XRT84L38. The XRT84L38 permits selection
of and access to, any one of these Configuration Register Banks, via the Three (3) Most Significant Address
Pins, A4, A5 and A6. The relationship between the states of A4, A5 and A6, and the corresponding
Configuration Register bank, is shown below.
TABLE 4: CHANNEL SELECTION
A6 A5 A4
000
CONFIGURATION REGISTER BANK
Channel 0
001
Channel 1
010
Channel 2
011
Channel 3
100
Channel 4
101
Channel 5
110
Channel 6
111
Channel 7
34
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