XRT84L38 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT84L38' PDF : 453 Pages View PDF
XRT84L38
REV. 1.0.1
OCTAL T1/E1/J1 FRAMER
4. After allowing the data on the Address Bus pins to settle, by waiting the appropriate Address Setup time,
the µC/µP should toggle the ALE_AS input pin "Low". This step causes the Framer to latch the contents of
the Address Bus into its internal circuitry. At this point, the address of the register or buffer location within
the Framer, has been selected.
5. Next, the µC/µP should indicate that this current bus cycle is a Write Operation by toggling the WR_R/W
(Write Strobe) input pin "Low". This action also enables the bi-directional data bus input drivers of the
Framer.
6. The µC/µP should then place the byte or word that it intends to write into the target register on the bi-direc-
tional data bus, D[7:0].
7. After waiting the appropriate amount of time for the data on the bi-directional data bus to settle, the µC/µP
should toggle the WR_R/W (Write Strobe) input pin "High". This action accomplishes two things:
a. It latches the contents of the bi-directional data bus into the Framer Microprocessor Interface block.
b. It terminates the write cycle.
Figure 5 presents a timing diagram which illustrates the behavior of the Microprocessor Interface signals,
during an Intel-type Programmed I/O Write Operation.
FIGURE 5. INTEL µP INTERFACE SIGNALS DURING PROGRAMMED I/O WRITE OPERATION
ALE_AS
A[6:0]
CS
D[7:0]
RD
WR_R/W
RDY_DTACK
Address of Target Register
Data to be Written
1.3.2.2.2
Motorola Mode Programmed I/O Access
If the Framer is interfaced to a Motorola-type µC/µP (e.g., the MC680X0 family, etc.), it should be configured to
operate in the Motorola mode.
1.3.2.2.2.1
Motorola Mode Read Cycle
Whenever a Motorola-type µC/µP wishes to read the contents of a register or some location within the Receive
LAPD Message or Receive OAM Cell Buffer, within the Framer, it should do the following.
1. Assert the ALE_AS (Address-Strobe) input pin by toggling it “Low”. This step enables the Address Bus
input drivers within the Microprocessor Interface Block of the Framer.
2. Place the address of the target register or buffer location within the Framer, on the Address Bus input pins,
A[6:0].
3. At the same time, the Address Decoding circuitry within the user's system should assert the CS (Chip
Select) input pin of the Framer, by toggling it "Low". This action enables further communication between
the µC/µP and the Framer Microprocessor Interface block.
4. After allowing the data on the Address Bus pins to settle, by waiting the appropriate Address Setup time,
the µC/µP should toggle the ALE_AS input pin "High". This step causes the Framer to latch the contents of
the Address Bus into its internal circuitry. At this point, the address of the register or buffer location within
the Framer has been selected.
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