REV. 1.0.1
BIT NUMBER
BIT NAME
0
FAS Selection bit
XRT84L38
OCTAL T1/E1/J1 FRAMER
BIT TYPE
BIT DESCRIPTION
R/W FAS Selection:
This Read/Write bit field allows the user to determine which algo-
rithm is used for searching FAS frame alignment pattern. When
an FAS alignment pattern is found and locked, the XRT84L38
will generate Receive Synchronization (RxSync_n) pulse.
When this bit is set to 0:
Algorithm 1 is selected for searching FAS frame alignment pat-
tern.
When this bit is set to 1:
Algorithm 2 is selected for searching FAS frame alignment pat-
tern.
Alarm Generation Register (AGR) - T1 Mode (Indirect Address = 0xn0H, 0x08H)
BIT 7
BIT 6
BIT 5
BIT 4
BIT3
BIT 2
BIT 1
Reserved
Loss of
Frame Dec-
laration
Enable
Yellow Alarm
Generation
Select Bit 1
Yellow Alarm
Generation
Select Bit 0
Alarm
Indication
Signal
Generation
Select Bit 1
Alarm
Indication
Signal
Generation
Select Bit 0
Alarm
Indication
Signal
Detection
Select Bit 1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
BIT 0
Alarm
Indication
Signal
Detection
Select Bit 0
R/W
0
BIT NUMBER
BIT NAME
7
Reserved
6
Loss of Frame
Declaration Enable
BIT TYPE
BIT DESCRIPTION
X
R/W Loss of Frame Declaration Enable:
This READ/WRITE bit-field permits the framer to declare Red
Alarm in case of Loss of Frame Alignment (LOF).
When receiver module of the framer detects Loss of Frame
Alignment in the incoming data stream, it will generate a Red
Alarm. The framer will also generate an RxLOFs interrupt to
notify the microprocessor that an LOF condition is occurred. A
Yellow Alarm is then returned to the remote transmitter to report
that the local receiver detects LOF.
When this bit is set to zero:
Red Alarm declaration is disabled.
When this bit is set to one:
Red Alarm declaration is enabled.
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