XRT84L38 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT84L38' PDF : 453 Pages View PDF
XRT84L38
OCTAL T1/E1/J1 FRAMER
BIT NUMBER
BIT NAME
0
Framing Bit Source
REV. 1.0.1
BIT TYPE
BIT DESCRIPTION
R/W Framing Bit Source:
This READ/WRITE bit-field permits the user to determine where
the framing alignment bits should be inserted.
When this bit is zero:
The framing alignment bits are generated and inserted by the
framer internally.
When this bit is one:
If the framer is operating in normal 1.544Mbit/s mode, the fram-
ing alignment bits are passed through from the Transmit Serial
Data input (TxSer_n).
Synchronization Mux Register (SMR) - E1 Mode (Indirect Address = 0xn0H, 0x09H)
BIT 7
BIT 6
BIT 5
BIT 4
BIT3
BIT 2
BIT 1
E bit Source E bit Source
Select bit 1 Select bit 0
Reserved
Synchroniza-
tion Signal
Direction
Transmit
Data Link
Source
Select bit 1
Transmit
Data Link
Source
Select bit 0
CRC-4
Source
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
BIT 0
Framing Bit
Source
R/W
0
BIT NUMBER
BIT NAME
7-6
E bit Source Select
5
Reserved
BIT TYPE
BIT DESCRIPTION
R/W E Source Select:
These READ/WRITE bit-fields permits the user to determine
where the E bits should be inserted and what the E bits should
be.
When these bits are 00:
The E bits are generated and inserted by the framer internally.
When these bits are 01:
The E bits are forced to be "0" and are inserted by the framer
internally. When these bits are 10:The E bits are forced to be "1"
and are inserted by the framer internally.
When these bits are 11:
Source of the E bits is HDLC controller of the framer. The E bits
are used to carry data link messages.
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