XRT84L38 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT84L38' PDF : 453 Pages View PDF
REV. 1.0.1
XRT84L38
OCTAL T1/E1/J1 FRAMER
Line Interface Control Register (LICR) - T1 Mode (Indirect Address = 0xn0H, 0x01H)
BIT 7
BIT 6
BIT 5
BIT 4
BIT3
BIT 2
BIT 1
Force
Transmit
LOS
NRZ Rail
Select
Loop-back
Select Bit 1
Loop-back
Select Bit 0
Transmit
Line Clock
Inversion
Receive Line
Clock
Inversion
Transmit
B8ZS
Enable
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
BIT 0
Receive
B8ZS
Enable
R/W
0
BIT NUMBER
BIT NAME
7
Force Transmit LOS
6
NRZ Rail Select
BIT TYPE
BIT DESCRIPTION
R/W Force Transmit LOS:
This READ/WRITE bit-field forces the framer to transmit Loss of
Signal (LOS) onto the LIU interface.
When this bit is set to one:
The framer is forced to transmit an LOS signal onto the LIU inter-
face outputs.
R/W NRZ Rail Select:
This READ/WRITE bit-field permits the user to select how data
are transmitted to and received from the LIU.
When this bit is set to zero:
The framer is operating in dual-rail mode. The TxPOS pin is car-
rying the positive data and the TxNEG pin is carrying the nega-
tive data. The positive and the negative data combined represent
the entire data stream going to the LIU.
The received data from the LIU will also be bipolar, that is, the
positive data received from RxPOS and the negative data
received from RxNEG combined represent the entire data
stream.
When this bit is set to one:
The framer is operating in single-rail mode. The TxPOS pin is
carrying the entire data stream. The TxNEG pin is carrying the
Multi-frame Synchronization Pulse.
The received data from the LIU will also be single-railed. The
RxPOS pin is carrying the entire data stream going into the
framer from LIU.
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