XRT91L34IV-F View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT91L34IV-F' PDF : 38 Pages View PDF
XRT91L34
REV. 1.0.1
QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR
2.4 Internal Digital Loss of Signal and External Signal Detection
XRT91L34 has an integrated Digital Loss of Signal (DLOS) circuit and supports external Signal Detection
(SDEXT) for detecting and determining received signal integrity. The internal DLOS circuit monitors the
incoming data stream. If the incoming data stream has no transition for more than 2.5µs, Loss of Signal is
declared. This LOS condition will be cleared when the circuit detects transitions in a 128µs interval sliding
window. Pulling the DLOSDIS pin signal to a high level in hardware mode or setting DLOSDIS bit in host mode
will disable the internal DLOS detection circuit to permit the framer/mapper interface to determine the Loss of
Signal declaration and clearance criteria for specific applications. The external Signal Detect function is
supported by the SDEXT input. An LVCMOS/LVTTL signal comes from the optical module through an output
usually called “SD” or “FLAG” which indicates the lack or presence of optical power. Depending on the
manufacturer of these devices, the polarity of this signal can be either active "Low" or active "High." The
SDEXT and POL inputs are Exclusive OR’ed to determine external Loss of Signal (LOS) condition. In the event
that internal DLOS is detected or an external SDEXT input indicates signal absence, the recovered serial data
output will be forced to a logic state "0," and the LOS status register is set whenever the host mode serial
microprocessor interface is active. This acts as a receive data mute upon LOS function to prevent data
chattering and to prevent random noise from being misinterpreted as valid incoming data. Figure 7 shows the
Loss of Signal Detection logic circuit. Table 4 specifies LOS declaration polarity settings.
FIGURE 7. LOSS OF SIGNAL DECLARATION CIRCUIT
DLOSDIS
(Internal) DLOS Detect
POL
(External) SDEXT
LOS Declaration
and
Recovered Data Mute
SDEXT
0
0
1
1
TABLE 4: EXTERNAL LOS DECLARATION POLARITY SETTING
POL
INTERNAL SIGNAL DETECT
LOS BIT STATE
(HOST MODE ONLY)
RXDO[3:0]P/N
0
Active Low. Optical signal presence
indicated by SDEXT logic 0 input from
Low
optical module.
Normal
Operation
1
Active High. Optical signal presence
High
indicated by SDEXT logic 1 input from
optical module.
LOS declared
Muted
0
Active Low. Optical signal presence
High
indicated by SDEXT logic 0 input from
optical module.
LOS declared
Muted
1
Active High. Optical signal presence
indicated by SDEXT logic 1 input from
Low
optical module.
Normal
Operation
17
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