XRT91L34IV-F View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT91L34IV-F' PDF : 38 Pages View PDF
XRT91L34
QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR
REV. 1.0.1
2.5 Multichannel Recovered Output Interface
The recovered data RXDO[3:0]P/N differential output drivers along with the recovered clock RXCLKO[3:0]P/N
differential output drivers can be configured for LVDS or Differential LVPECL standard operation. In addition,
Host Mode operation permits each of the channelized recovered clock output to be independently disabled
such as in repeater applications to save power.
FIGURE 8. MULTICHANNEL RECOVERED OUTPUT INTERFACE BLOCK
LVDS Operation
XRT91L34
STS-12/3/1
or
STM-4/1/0
Clock and Data
Recovery
OUTCFG = 0
RXDO0P
RXDO0N Channel 0 100
RXDO1P
RXDO1N Channel 1 100
RXDO2P
RXDO2N Channel 2 100
RXDO3P
RXDO3N Channel 3 100
RXCLKO[3:0]P and
RXCLKO[3:0]N
Clock Output pins
terminated similarly
SONET Framer/
ASIC
Internal or External 100 Ohm
line-to-line termination required on
RXDO[3:0]P and RXDO[3:0]N pins
on the SONET Framer/ASIC end
OUTCFG = 1
VDDIO
LVPECL Operation
XRT91L34
STS-12/3/1
or
STM-4/1/0
Clock and Data
Recovery
RXDO0P
RXDO0N
RXDO1P
RXDO1N
RXDO2P
RXDO2N
RXDO3P
RXDO3N
RXCLKO[3:0]P and
RXCLKO[3:0]N
Clock Output pins
terminated similarly
120 x 8
Install terminators as close to
SONET Framer/ ASIC pins
Channel 0
SONET Framer/
ASIC
Channel 1
Channel 2
Channel 3
82 x 8
18
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