XRT91L34IV-F View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT91L34IV-F' PDF : 38 Pages View PDF
XRT91L34
QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR
REV. 1.0.1
TABLE 10: MICROPROCESSOR INTERFACE REGISTER 0X01 BIT DESCRIPTION
CHANNEL INTERRUPT STATUS REGISTER (0X01)
BIT
NAME
FUNCTION
Regis- Default
ter
Value
Type (HW Reset)
D7
Reserved This Register Bit is Not Used
RO
0
D6
Reserved This Register Bit is Not Used
RO
0
D5
Reserved This Register Bit is Not Used
RO
0
D4
Reserved This Register Bit is Not Used
RO
0
D3
INTS3 Channel 3 Interrupt Status
This bit indicates an interrupt occuring in Channel 3.
"0" = No Interrupt Generated
"1" = Channel Interrupt Occurring
RO
0
D2
INTS2 Channel 2 Interrupt Status
This bit indicates an interrupt occuring in Channel 2.
"0" = No Interrupt Generated
"1" = Channel Interrupt Occurring
RO
0
D1
INTS1 Channel 1 Interrupt Status
This bit indicates an interrupt occuring in Channel 1.
"0" = No Interrupt Generated
"1" = Channel Interrupt Occurring
RO
0
D0
INTS0 Channel 0 Interrupt Status
This bit indicates an interrupt occuring in Channel 0.
"0" = No Interrupt Generated
"1" = Channel Interrupt Occurring
RO
0
TABLE 11: MICROPROCESSOR INTERFACE REGISTER 0X02 BIT DESCRIPTION
DEVICE "ID" REGISTER (0X02)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Device "ID" The device "ID" of the XRT91L34 CDR is 0x8405h. Along with the
RO
1
D6
MSB revision "ID", the device "ID" is used to enable software to identify
0
D5
the silicon adding flexibility for system control and debug.
0
D4
0
D3
0
D2
1
D1
0
D0
0
28
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