PRELIMINARY
XRT91L81
2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
REV. P1.0.3
TABLE 13: MICROPROCESSOR REGISTER 0X02H BIT DESCRIPTION
DEVICE "ID" REGISTER (0X3EH)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Device "ID" The device "ID" of the XRT91L81 LIU is 0xC0h. Along with the
RO
1
D6
revision "ID", the device "ID" is used to enable software to identify
1
D5
the silicon adding flexibility for system control and debug.
0
D4
0
D3
0
D2
0
D1
0
D0
0
TABLE 14: MICROPROCESSOR REGISTER 0X01H BIT DESCRIPTION
REVISION "ID" REGISTER (0X3FH)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Revision The revision "ID" of the XRT91L81 LIU is used to enable software
RO
0
D6
"ID" to identify which revision of silicon is currently being tested. The
0
D5
revision "ID" for the first revision of silicon (Revision A) will be
0
0x01h.
D4
0
D3
0
D2
0
D1
0
D0
1
35