ADSP-21469KBZ-ENG2 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-21469KBZ-ENG2' PDF : 56 Pages View PDF
ADSP-21469/ADSP-21469W
Preliminary Technical Data
DAI_P20-1
(SCLK)
DATA RECEIVE—INTERNAL CLOCK
DRIVE EDGE
tSCLKIW
SAMPLE EDGE
DAI_P20-1
(FS)
tHOFSIR
tDFSIR
tSFSI
DAI_P20-1
(DATA CHANNEL A/B)
tSDRI
tHFSI
tHDRI
DAI_P20-1
(SCLK)
DATA RECEIVE—EXTERNAL CLOCK
DRIVE EDGE
tSCLK W
SAMPLE EDGE
DAI_P20-1
(FS)
tHOFSE
tDFSE
tSFSE
DAI_P20-1
(DATA CHANNEL A/B)
tSDRE
tHFSE
tHDRE
NOTE: EITHER THE RISING EDGE OR FALLING EDGE OF SCLK (EXTERNAL) OR SCLK (INTERNAL) CAN BE USED AS THE ACTIVE SAMPLING EDGE.
DATA TRANSMIT—INTERNAL CLOCK
DRIVE EDGE
SAMPLE EDGE
DAI_P20-1
(SCLK)
tSCLKIW
DAI_P20-1
(FS)
tHO FSI
tDFSI
tSFSI
tHDTI
DAI_P20-1
(DATA CHANNEL A/B)
tDDTI
tHFSI
DATA TRANSMIT—EXTERNAL CLOCK
DRIVE EDGE
SAMPLE EDGE
DAI_P20-1
(SCLK)
tSCLKW
DAI_P20-1
(FS)
tHOFSE
tHDTE
DAI_P20-1
(DATA CHANNEL A/B)
tDFSE
tSFSE
tDDTE
tHFSE
NOTE: EITHER THE RISING EDGE OR FALLING EDGE OF SCLK (EXTERNAL) OR SCLK (INTERNAL) CAN BE USED AS THE ACTIVE SAMPLING EDGE.
DAI_P20-1
SCLK (EXT)
DRIVE EDGE
DAI_P20-1
(DATA CHANNEL A/B)
DRIVE EDGE
tDDTEN
DAI_P20-1
SCLK (INT)
tDDTIN
DAI_P20-1
(DATA CHANNEL A/B)
DRIVE EDGE
SCLK
tDDTTE
Figure 23. Serial Ports
Rev. PrB | Page 36 of 56 | November 2008
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