ADSP-21990 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-21990' PDF : 50 Pages View PDF
ADSP-21990
Serial Port Timing
Table 12 and Figure 13 describe SPORT transmit and receive
operations, while Figure 14 and Figure 15 describe SPORT
Frame Sync operations.
Table 12. Serial Port1, 2
Parameter
External Clock Timing Requirements
tSFSE
tHFSE
tSDRE
tHDRE
tSCLKW
tSCLK
TFS/RFS Setup Before TCLK/RCLK3
TFS/RFS Hold After TCLK/RCLK3
Receive Data Setup Before RCLK3
Receive Data Hold After RCLK3
TCLK/RCLK Width
TCLK/RCLK Period
Internal Clock Timing Requirements
tSFSI
TFS Setup Before TCLK4; RFS Setup Before RCLK3
tHFSI
TFS/RFS Hold After TCLK/RCLK3
tSDRI
Receive Data Setup Before RCLK3
tHDRI
Receive Data Hold After RCLK3
External or Internal Clock Switching Characteristics
tDFSE
TFS/RFS Delay After TCLK/RCLK (Internally
Generated FS)4
tHOFSE
TFS/RFS Hold After TCLK/RCLK (Internally
Generated FS)4
Min
4
4
1.5
4
0.5tHCLK – 1
2tHCLK
Max
4
3
2
5
14
3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
External Clock Switching Characteristics
tDDTE
Transmit Data Delay After TCLK4
tHDTE
Transmit Data Hold After TCLK4
13.4
ns
4
ns
Internal Clock Switching Characteristics
tDDTI
Transmit Data Delay After TCLK4
tHDTI
Transmit Data Hold After TCLK4
tSCLKIW
TCLK/RCLK Width
13.4
ns
4
ns
0.5tHCLK – 3.5
0.5tHCLK + 2.5
ns
Enable and Three-State Switching Characteristics5
tDTENE
tDDTTE
tDTENI
tDDTTI
Data Enable from External TCLK4
Data Disable from External TCLK4
Data Enable from Internal TCLK4
Data Disable from External TCLK4
0
12.1
ns
13
ns
0
13
ns
12
ns
External Late Frame Sync Switching Characteristics
tDDTLFSE
Data Delay from Late External TFS with MCE=1, MFD=06, 7
tDTENLFSE
Data Enable from Late FS or MCE=1, MFD=06, 7
3.5
10.5
ns
ns
1 To determine whether communication is possible between two devices at clock speed n, the following specifications must be confirmed: 1) frame sync delay and frame
sync setup-and-hold, 2) data delay and data setup-and-hold, and 3) SCLK width.
2 Word selected timing for I2S mode is the same as TFS/RFS timing (normal framing only).
3 Referenced to sample edge.
4 Referenced to drive edge.
Rev. A | Page 33 of 50 | August 2007
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