ADSP-BF537BBCZ-5AV View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-BF537BBCZ-5AV' PDF : 68 Pages View PDF
ADSP-BF534/ADSP-BF536/ADSP-BF537
Asynchronous Memory Write Cycle Timing
Table 25. Asynchronous Memory Write Cycle Timing
Parameter
Timing Requirements
tSARDY
ARDY Setup Before CLKOUT
tHARDY
ARDY Hold After CLKOUT
Switching Characteristics
tDDAT
tENDAT
tDO
tHO
DATA15–0 Disable After CLKOUT
DATA15–0 Enable After CLKOUT
Output Delay After CLKOUT1
Output Hold After CLKOUT 1
1 Output pins include AMS3–0, ABE1–0, ADDR19–1, AOE, AWE.
CLKOUT
AMSx
SETUP
2 CYCLES
PROGRAMMED
WRITE
ACCESS
2 CYCLES
ACCESS
EXTEND HOLD
1 CYCLE 1 CYCLE
tDO
tHO
Min
Max
Unit
4.0
ns
0.0
ns
6.0
ns
1.0
ns
6.0
ns
0.8
ns
ABE1–0
ADDR19–1
AWE
ARDY
DATA 15–0
tDO
tSARDY
tHARDY
tENDAT
tSARDY
tHO
tHARDY
tDDAT
Figure 12. Asynchronous Memory Write Cycle Timing
Rev. J | Page 32 of 68 | February 2014
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