ADSP-BF537BBCZ-5AV View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-BF537BBCZ-5AV' PDF : 68 Pages View PDF
ADSP-BF534/ADSP-BF536/ADSP-BF537
SDRAM Interface Timing
Table 27. SDRAM Interface Timing
Parameter
Min
Timing Requirements
tSSDAT
DATA15–0 Setup Before CLKOUT
1.5
tHSDAT
DATA15–0 Hold After CLKOUT
0.8
Switching Characteristics
tDCAD
COMMAND1, ADDR19–1, DATA15–0 Delay After CLKOUT
tHCAD
COMMAND1, ADDR19–1, DATA15–0 Hold After CLKOUT
1.0
tDSDAT
DATA15–0 Disable After CLKOUT
tENSDAT
DATA15–0 Enable After CLKOUT
0.5
tSCLK2
CLKOUT Period when TJ +105°C
7.5
tSCLK2
CLKOUT Period when TJ +105°C
10
tSCLKH
CLKOUT Width High
2.5
tSCLKL
CLKOUT Width Low
2.5
1 Command pins include: SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
2 These limits are specific to the SDRAM interface only. In addition, CLKOUT must always comply with the limits in Table 14 on Page 24.
CLKOUT
DATA (IN)
DATA (OUT)
COMMAND,
ADDRESS
(OUT)
tSSDAT
tSCLK
tHSDAT
tENSDAT
tSCLKL
tSCLKH
tDCAD
tHCAD
tDSDAT
tDCAD
tHCAD
NOTE: COMMAND = SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
Figure 14. SDRAM Interface Timing
Max
4.0
6.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. J | Page 34 of 68 | February 2014
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