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ADSP-BF537BBCZ-5AV View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
ADSP-BF537BBCZ-5AV
ADI
Analog Devices ADI
'ADSP-BF537BBCZ-5AV' PDF : 68 Pages View PDF
ADSP-BF534/ADSP-BF536/ADSP-BF537
10/100 Ethernet MAC Controller Timing
Table 40 through Table 45 and Figure 30 through Figure 35
describe the 10/100 Ethernet MAC controller operations. This
feature is only available on the ADSP-BF536 and ADSP-BF537
processors.
Table 40. 10/100 Ethernet MAC Controller Timing: MII Receive Signal
Parameter1
fERXCLK
ERxCLK Frequency (fSCLK = SCLK Frequency)
tERXCLKW
ERxCLK Width (tERxCLK = ERxCLK Period)
tERXCLKIS
Rx Input Valid to ERxCLK Rising Edge (Data In Setup)
tERXCLKIH
ERxCLK Rising Edge to Rx Input Invalid (Data In Hold)
1 MII inputs synchronous to ERxCLK are ERxD3–0, ERxDV, and ERxER.
Table 41. 10/100 Ethernet MAC Controller Timing: MII Transmit Signal
Parameter1
fETXCLK
ETxCLK Frequency (fSCLK = SCLK Frequency)
tETXCLKW
ETxCLK Width (tETXCLK = ETxCLK Period)
tETXCLKOV
ETxCLK Rising Edge to Tx Output Valid (Data Out Valid)
tETXCLKOH
ETxCLK Rising Edge to Tx Output Invalid (Data Out Hold)
1 MII outputs synchronous to ETxCLK are ETxD3–0.
Table 42. 10/100 Ethernet MAC Controller Timing: RMII Receive Signal
Parameter1
fREFCLK
REF_CLK Frequency (fSCLK = SCLK Frequency)
tREFCLKW
REF_CLK Width (tREFCLK = REFCLK Period)
tREFCLKIS
Rx Input Valid to RMII REF_CLK Rising Edge (Data In Setup)
tREFCLKIH
RMII REF_CLK Rising Edge to Rx Input Invalid (Data In Hold)
1 RMII inputs synchronous to RMII REF_CLK are ERxD1–0, RMII CRS_DV, and ERxER.
Table 43. 10/100 Ethernet MAC Controller Timing: RMII Transmit Signal
Parameter1
tREFCLKOV
tREFCLKOH
RMII REF_CLK Rising Edge to Tx Output Valid (Data Out Valid)
RMII REF_CLK Rising Edge to Tx Output Invalid (Data Out Hold)
1 RMII outputs synchronous to RMII REF_CLK are ETxD1–0.
Min
None
tERxCLK × 35%
7.5
7.5
Max
25 + 1%
fSCLK + 1%
tERxCLK × 65%
Min
None
tETxCLK × 35%
0
Max
25 + 1%
fSCLK + 1%
tETxCLK × 65%
20
Min
None
tREFCLK × 35%
4
2
Max
50 + 1%
2 × fSCLK + 1%
tREFCLK × 65%
Min
Max
7.5
2
Unit
MHz
ns
ns
ns
Unit
MHz
ns
ns
ns
Unit
MHz
ns
ns
ns
Unit
ns
ns
Rev. J | Page 47 of 68 | February 2014
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