ATA6612C View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
ATA6612C
Atmel Corporation
'ATA6612C' PDF : 312 Pages View PDF
5.7.7 Power Reduction Register
The power reduction register, PRR, provides a method to stop the clock to individual peripherals to reduce power
consumption. The current state of the peripheral is frozen and the I/O registers can not be read or written. Resources used
by the peripheral when stopping the clock will remain occupied, hence the peripheral should in most cases be disabled
before stopping the clock. Waking up a module, which is done by clearing the bit in PRR, puts the module in the same state
as before shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall power consumption. See
Section 6.3.1.1 “Power-down Supply Current” on page 281 for examples. In all other sleep modes, the clock is already
stopped.
5.7.7.1 Power Reduction Register - PRR
Bit
7
6
5
4
3
2
1
0
PRTWI PRTIM2 PRTIM0
–
PRTIM1 PRSPI PRUSART0 PRADC PRR
Read/Write R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bit 7 - PRTWI: Power Reduction TWI
Writing a logic one to this bit shuts down the TWI by stopping the clock to the module. When waking up the TWI again, the
TWI should be re initialized to ensure proper operation.
• Bit 6 - PRTIM2: Power Reduction Timer/Counter2
Writing a logic one to this bit shuts down the Timer/Counter2 module in synchronous mode (AS2 is 0). When the
Timer/Counter2 is enabled, operation will continue like before the shutdown.
• Bit 5 - PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0 is enabled, operation will
continue like before the shutdown.
• Bit 4 - Res: Reserved bit
This bit is reserved in Atmel® ATA6612C/ATA6613C and will always read as zero.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1 is enabled, operation will
continue like before the shutdown.
• Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface
If using debugWIRE on-chip debug system, this bit should not be written to one. Writing a logic one to this bit shuts down the
serial peripheral interface by stopping the clock to the module. When waking up the SPI again, the SPI should be
re-initialized to ensure proper operation.
• Bit 1 - PRUSART0: Power Reduction USART0
Writing a logic one to this bit shuts down the USART by stopping the clock to the module. When waking up the USART
again, the USART should be re-initialized to ensure proper operation.
• Bit 0 - PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down. The analog comparator
cannot use the ADC input MUX when the ADC is shut down.
58 ATA6612C/ATA6613C [DATASHEET]
9111L–AUTO–11/14
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